From: Daniel Henrique Barboza Date: Sun, 22 Dec 2024 21:45:07 +0000 (-0300) Subject: hw/riscv/riscv-iommu-sys.c: fix duplicated 'table_size' X-Git-Tag: v10.0.0-rc0~104^2~2 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=a8743193ff1ed221f42c0341182cada3d67793cc;p=thirdparty%2Fqemu.git hw/riscv/riscv-iommu-sys.c: fix duplicated 'table_size' Trivial fix for the following ticket: CID 1568580: Incorrect expression (EVALUATION_ORDER) In "table_size = table_size = n_vectors * 16U", "table_size" is written twice with the same value. Cc: qemu-trivial@nongnu.org Cc: Peter Maydell Resolves: Coverity CID 1568580 Fixes: 01c1caa9d1 ("hw/riscv/virt.c, riscv-iommu-sys.c: add MSIx support") Signed-off-by: Daniel Henrique Barboza Reviewed-by: Michael Tokarev Signed-off-by: Michael Tokarev --- diff --git a/hw/riscv/riscv-iommu-sys.c b/hw/riscv/riscv-iommu-sys.c index 28153f38da2..65b24fb07de 100644 --- a/hw/riscv/riscv-iommu-sys.c +++ b/hw/riscv/riscv-iommu-sys.c @@ -121,7 +121,7 @@ static void riscv_iommu_sysdev_init_msi(RISCVIOMMUStateSys *s, uint32_t n_vectors) { RISCVIOMMUState *iommu = &s->iommu; - uint32_t table_size = table_size = n_vectors * PCI_MSIX_ENTRY_SIZE; + uint32_t table_size = n_vectors * PCI_MSIX_ENTRY_SIZE; uint32_t table_offset = RISCV_IOMMU_REG_MSI_CONFIG; uint32_t pba_size = QEMU_ALIGN_UP(n_vectors, 64) / 8; uint32_t pba_offset = RISCV_IOMMU_REG_MSI_CONFIG + 256;