From: Greg Kroah-Hartman Date: Mon, 24 Jan 2022 12:47:04 +0000 (+0100) Subject: 5.16-stable patches X-Git-Tag: v4.4.300~59 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=a9117a9b8ba51202576c0803c21ce1ed0803c614;p=thirdparty%2Fkernel%2Fstable-queue.git 5.16-stable patches added patches: arm-dts-gpio-ranges-property-is-now-required.patch clk-emit-a-stern-warning-with-writable-debugfs-enabled.patch clk-si5341-fix-clock-hw-provider-cleanup.patch gpio-idt3243x-fix-irq-check-in-idt_gpio_probe.patch gpio-mpc8xxx-fix-irq-check-in-mpc8xxx_probe.patch net-axienet-increase-reset-timeout.patch net-axienet-wait-for-phyrstcmplt-after-core-reset.patch net-smc-fix-hung_task-when-removing-smc-r-devices.patch pinctrl-rockchip-fix-gpio-device-creation.patch --- diff --git a/queue-5.16/arm-dts-gpio-ranges-property-is-now-required.patch b/queue-5.16/arm-dts-gpio-ranges-property-is-now-required.patch new file mode 100644 index 00000000000..45f66755294 --- /dev/null +++ b/queue-5.16/arm-dts-gpio-ranges-property-is-now-required.patch @@ -0,0 +1,50 @@ +From e8f24c58d1b69ecf410a673c22f546dc732bb879 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 6 Dec 2021 09:22:37 +0000 +Subject: ARM: dts: gpio-ranges property is now required + +From: Phil Elwell + +commit e8f24c58d1b69ecf410a673c22f546dc732bb879 upstream. + +Since [1], added in 5.7, the absence of a gpio-ranges property has +prevented GPIOs from being restored to inputs when released. +Add those properties for BCM283x and BCM2711 devices. + +[1] commit 2ab73c6d8323 ("gpio: Support GPIO controllers without + pin-ranges") + +Fixes: 2ab73c6d8323 ("gpio: Support GPIO controllers without pin-ranges") +Signed-off-by: Phil Elwell +Acked-by: Florian Fainelli +Reviewed-by: Linus Walleij +Link: https://lore.kernel.org/r/20211206092237.4105895-3-phil@raspberrypi.com +Signed-off-by: Linus Walleij +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm/boot/dts/bcm2711.dtsi | 2 ++ + arch/arm/boot/dts/bcm283x.dtsi | 2 ++ + 2 files changed, 4 insertions(+) + +--- a/arch/arm/boot/dts/bcm2711.dtsi ++++ b/arch/arm/boot/dts/bcm2711.dtsi +@@ -584,6 +584,8 @@ + + gpio-ranges = <&gpio 0 0 58>; + ++ gpio-ranges = <&gpio 0 0 58>; ++ + gpclk0_gpio49: gpclk0_gpio49 { + pin-gpclk { + pins = "gpio49"; +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -128,6 +128,8 @@ + + gpio-ranges = <&gpio 0 0 54>; + ++ gpio-ranges = <&gpio 0 0 54>; ++ + /* Defines common pin muxing groups + * + * While each pin can have its mux selected diff --git a/queue-5.16/clk-emit-a-stern-warning-with-writable-debugfs-enabled.patch b/queue-5.16/clk-emit-a-stern-warning-with-writable-debugfs-enabled.patch new file mode 100644 index 00000000000..9cba3269eb9 --- /dev/null +++ b/queue-5.16/clk-emit-a-stern-warning-with-writable-debugfs-enabled.patch @@ -0,0 +1,51 @@ +From 489a71964f9d74e697a12cd0ace20ed829eb1f93 Mon Sep 17 00:00:00 2001 +From: Stephen Boyd +Date: Thu, 9 Dec 2021 17:34:05 -0800 +Subject: clk: Emit a stern warning with writable debugfs enabled + +From: Stephen Boyd + +commit 489a71964f9d74e697a12cd0ace20ed829eb1f93 upstream. + +We don't want vendors to be enabling this part of the clk code and +shipping it to customers. Exposing the ability to change clk frequencies +and parents via debugfs is potentially damaging to the system if folks +don't know what they're doing. Emit a strong warning so that the message +is clear: don't enable this outside of development systems. + +Fixes: 37215da5553e ("clk: Add support for setting clk_rate via debugfs") +Cc: Geert Uytterhoeven +Link: https://lore.kernel.org/r/20211210014237.2130300-1-sboyd@kernel.org +Signed-off-by: Stephen Boyd +Signed-off-by: Greg Kroah-Hartman +--- + drivers/clk/clk.c | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +--- a/drivers/clk/clk.c ++++ b/drivers/clk/clk.c +@@ -3343,6 +3343,24 @@ static int __init clk_debug_init(void) + { + struct clk_core *core; + ++#ifdef CLOCK_ALLOW_WRITE_DEBUGFS ++ pr_warn("\n"); ++ pr_warn("********************************************************************\n"); ++ pr_warn("** NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE **\n"); ++ pr_warn("** **\n"); ++ pr_warn("** WRITEABLE clk DebugFS SUPPORT HAS BEEN ENABLED IN THIS KERNEL **\n"); ++ pr_warn("** **\n"); ++ pr_warn("** This means that this kernel is built to expose clk operations **\n"); ++ pr_warn("** such as parent or rate setting, enabling, disabling, etc. **\n"); ++ pr_warn("** to userspace, which may compromise security on your system. **\n"); ++ pr_warn("** **\n"); ++ pr_warn("** If you see this message and you are not debugging the **\n"); ++ pr_warn("** kernel, report this immediately to your vendor! **\n"); ++ pr_warn("** **\n"); ++ pr_warn("** NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE **\n"); ++ pr_warn("********************************************************************\n"); ++#endif ++ + rootdir = debugfs_create_dir("clk", NULL); + + debugfs_create_file("clk_summary", 0444, rootdir, &all_lists, diff --git a/queue-5.16/clk-si5341-fix-clock-hw-provider-cleanup.patch b/queue-5.16/clk-si5341-fix-clock-hw-provider-cleanup.patch new file mode 100644 index 00000000000..0e4a6de41cd --- /dev/null +++ b/queue-5.16/clk-si5341-fix-clock-hw-provider-cleanup.patch @@ -0,0 +1,34 @@ +From 49a8f2bc8d88702783c7e163ec84374e9a022f71 Mon Sep 17 00:00:00 2001 +From: Robert Hancock +Date: Wed, 12 Jan 2022 14:38:16 -0600 +Subject: clk: si5341: Fix clock HW provider cleanup + +From: Robert Hancock + +commit 49a8f2bc8d88702783c7e163ec84374e9a022f71 upstream. + +The call to of_clk_add_hw_provider was not undone on remove or on probe +failure, which could cause an oops on a subsequent attempt to retrieve +clocks for the removed device. Switch to the devm version of the +function to avoid this issue. + +Fixes: 3044a860fd09 ("clk: Add Si5341/Si5340 driver") +Signed-off-by: Robert Hancock +Link: https://lore.kernel.org/r/20220112203816.1784610-1-robert.hancock@calian.com +Signed-off-by: Stephen Boyd +Signed-off-by: Greg Kroah-Hartman +--- + drivers/clk/clk-si5341.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/clk/clk-si5341.c ++++ b/drivers/clk/clk-si5341.c +@@ -1740,7 +1740,7 @@ static int si5341_probe(struct i2c_clien + clk_prepare(data->clk[i].hw.clk); + } + +- err = of_clk_add_hw_provider(client->dev.of_node, of_clk_si5341_get, ++ err = devm_of_clk_add_hw_provider(&client->dev, of_clk_si5341_get, + data); + if (err) { + dev_err(&client->dev, "unable to add clk provider\n"); diff --git a/queue-5.16/gpio-idt3243x-fix-irq-check-in-idt_gpio_probe.patch b/queue-5.16/gpio-idt3243x-fix-irq-check-in-idt_gpio_probe.patch new file mode 100644 index 00000000000..3701d08c1b1 --- /dev/null +++ b/queue-5.16/gpio-idt3243x-fix-irq-check-in-idt_gpio_probe.patch @@ -0,0 +1,40 @@ +From 30fee1d7462a446ade399c0819717a830cbdca69 Mon Sep 17 00:00:00 2001 +From: Miaoqian Lin +Date: Fri, 14 Jan 2022 06:51:24 +0000 +Subject: gpio: idt3243x: Fix IRQ check in idt_gpio_probe + +From: Miaoqian Lin + +commit 30fee1d7462a446ade399c0819717a830cbdca69 upstream. + +platform_get_irq() returns negative error number instead 0 on failure. +And the doc of platform_get_irq() provides a usage example: + + int irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + +Fix the check of return value to catch errors correctly. + +Fixes: 4195926aedca ("gpio: Add support for IDT 79RC3243x GPIO controller") +Signed-off-by: Miaoqian Lin +Reviewed-by: Linus Walleij +Signed-off-by: Bartosz Golaszewski +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpio/gpio-idt3243x.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/gpio/gpio-idt3243x.c ++++ b/drivers/gpio/gpio-idt3243x.c +@@ -164,8 +164,8 @@ static int idt_gpio_probe(struct platfor + return PTR_ERR(ctrl->pic); + + parent_irq = platform_get_irq(pdev, 0); +- if (!parent_irq) +- return -EINVAL; ++ if (parent_irq < 0) ++ return parent_irq; + + girq = &ctrl->gc.irq; + girq->chip = &idt_gpio_irqchip; diff --git a/queue-5.16/gpio-mpc8xxx-fix-irq-check-in-mpc8xxx_probe.patch b/queue-5.16/gpio-mpc8xxx-fix-irq-check-in-mpc8xxx_probe.patch new file mode 100644 index 00000000000..52445c562a4 --- /dev/null +++ b/queue-5.16/gpio-mpc8xxx-fix-irq-check-in-mpc8xxx_probe.patch @@ -0,0 +1,40 @@ +From 0b39536cc699db6850c426db7f9cb45923de40c5 Mon Sep 17 00:00:00 2001 +From: Miaoqian Lin +Date: Fri, 14 Jan 2022 06:48:20 +0000 +Subject: gpio: mpc8xxx: Fix IRQ check in mpc8xxx_probe + +From: Miaoqian Lin + +commit 0b39536cc699db6850c426db7f9cb45923de40c5 upstream. + +platform_get_irq() returns negative error number instead 0 on failure. +And the doc of platform_get_irq() provides a usage example: + + int irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + +Fix the check of return value to catch errors correctly. + +Fixes: 76c47d1449fc ("gpio: mpc8xxx: Add ACPI support") +Signed-off-by: Miaoqian Lin +Reviewed-by: Linus Walleij +Signed-off-by: Bartosz Golaszewski +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpio/gpio-mpc8xxx.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/gpio/gpio-mpc8xxx.c ++++ b/drivers/gpio/gpio-mpc8xxx.c +@@ -388,8 +388,8 @@ static int mpc8xxx_probe(struct platform + } + + mpc8xxx_gc->irqn = platform_get_irq(pdev, 0); +- if (!mpc8xxx_gc->irqn) +- return 0; ++ if (mpc8xxx_gc->irqn < 0) ++ return mpc8xxx_gc->irqn; + + mpc8xxx_gc->irq = irq_domain_create_linear(fwnode, + MPC8XXX_GPIO_PINS, diff --git a/queue-5.16/net-axienet-increase-reset-timeout.patch b/queue-5.16/net-axienet-increase-reset-timeout.patch new file mode 100644 index 00000000000..0d657ff9b47 --- /dev/null +++ b/queue-5.16/net-axienet-increase-reset-timeout.patch @@ -0,0 +1,58 @@ +From 2e5644b1bab2ccea9cfc7a9520af95b94eb0dbf1 Mon Sep 17 00:00:00 2001 +From: Robert Hancock +Date: Tue, 18 Jan 2022 15:41:24 -0600 +Subject: net: axienet: increase reset timeout + +From: Robert Hancock + +commit 2e5644b1bab2ccea9cfc7a9520af95b94eb0dbf1 upstream. + +The previous timeout of 1ms was too short to handle some cases where the +core is reset just after the input clocks were started, which will +be introduced in an upcoming patch. Increase the timeout to 50ms. Also +simplify the reset timeout checking to use read_poll_timeout. + +Fixes: 8a3b7a252dca9 ("drivers/net/ethernet/xilinx: added Xilinx AXI Ethernet driver") +Signed-off-by: Robert Hancock +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +Signed-off-by: Greg Kroah-Hartman +--- + drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 19 +++++++++---------- + 1 file changed, 9 insertions(+), 10 deletions(-) + +--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c ++++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c +@@ -496,7 +496,8 @@ static void axienet_setoptions(struct ne + + static int __axienet_device_reset(struct axienet_local *lp) + { +- u32 timeout; ++ u32 value; ++ int ret; + + /* Reset Axi DMA. This would reset Axi Ethernet core as well. The reset + * process of Axi DMA takes a while to complete as all pending +@@ -506,15 +507,13 @@ static int __axienet_device_reset(struct + * they both reset the entire DMA core, so only one needs to be used. + */ + axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, XAXIDMA_CR_RESET_MASK); +- timeout = DELAY_OF_ONE_MILLISEC; +- while (axienet_dma_in32(lp, XAXIDMA_TX_CR_OFFSET) & +- XAXIDMA_CR_RESET_MASK) { +- udelay(1); +- if (--timeout == 0) { +- netdev_err(lp->ndev, "%s: DMA reset timeout!\n", +- __func__); +- return -ETIMEDOUT; +- } ++ ret = read_poll_timeout(axienet_dma_in32, value, ++ !(value & XAXIDMA_CR_RESET_MASK), ++ DELAY_OF_ONE_MILLISEC, 50000, false, lp, ++ XAXIDMA_TX_CR_OFFSET); ++ if (ret) { ++ dev_err(lp->dev, "%s: DMA reset timeout!\n", __func__); ++ return ret; + } + + return 0; diff --git a/queue-5.16/net-axienet-wait-for-phyrstcmplt-after-core-reset.patch b/queue-5.16/net-axienet-wait-for-phyrstcmplt-after-core-reset.patch new file mode 100644 index 00000000000..b8642f666fc --- /dev/null +++ b/queue-5.16/net-axienet-wait-for-phyrstcmplt-after-core-reset.patch @@ -0,0 +1,51 @@ +From b400c2f4f4c53c86594dd57098970d97d488bfde Mon Sep 17 00:00:00 2001 +From: Robert Hancock +Date: Tue, 18 Jan 2022 15:41:25 -0600 +Subject: net: axienet: Wait for PhyRstCmplt after core reset + +From: Robert Hancock + +commit b400c2f4f4c53c86594dd57098970d97d488bfde upstream. + +When resetting the device, wait for the PhyRstCmplt bit to be set +in the interrupt status register before continuing initialization, to +ensure that the core is actually ready. When using an external PHY, this +also ensures we do not start trying to access the PHY while it is still +in reset. The PHY reset is initiated by the core reset which is +triggered just above, but remains asserted for 5ms after the core is +reset according to the documentation. + +The MgtRdy bit could also be waited for, but unfortunately when using +7-series devices, the bit does not appear to work as documented (it +seems to behave as some sort of link state indication and not just an +indication the transceiver is ready) so it can't really be relied on for +this purpose. + +Fixes: 8a3b7a252dca9 ("drivers/net/ethernet/xilinx: added Xilinx AXI Ethernet driver") +Signed-off-by: Robert Hancock +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +Signed-off-by: Greg Kroah-Hartman +--- + drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c ++++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c +@@ -516,6 +516,16 @@ static int __axienet_device_reset(struct + return ret; + } + ++ /* Wait for PhyRstCmplt bit to be set, indicating the PHY reset has finished */ ++ ret = read_poll_timeout(axienet_ior, value, ++ value & XAE_INT_PHYRSTCMPLT_MASK, ++ DELAY_OF_ONE_MILLISEC, 50000, false, lp, ++ XAE_IS_OFFSET); ++ if (ret) { ++ dev_err(lp->dev, "%s: timeout waiting for PhyRstCmplt\n", __func__); ++ return ret; ++ } ++ + return 0; + } + diff --git a/queue-5.16/net-smc-fix-hung_task-when-removing-smc-r-devices.patch b/queue-5.16/net-smc-fix-hung_task-when-removing-smc-r-devices.patch new file mode 100644 index 00000000000..95fe3cdd657 --- /dev/null +++ b/queue-5.16/net-smc-fix-hung_task-when-removing-smc-r-devices.patch @@ -0,0 +1,78 @@ +From 56d99e81ecbc997a5f984684d0eeb583992b2072 Mon Sep 17 00:00:00 2001 +From: Wen Gu +Date: Sun, 16 Jan 2022 15:43:42 +0800 +Subject: net/smc: Fix hung_task when removing SMC-R devices + +From: Wen Gu + +commit 56d99e81ecbc997a5f984684d0eeb583992b2072 upstream. + +A hung_task is observed when removing SMC-R devices. Suppose that +a link group has two active links(lnk_A, lnk_B) associated with two +different SMC-R devices(dev_A, dev_B). When dev_A is removed, the +link group will be removed from smc_lgr_list and added into +lgr_linkdown_list. lnk_A will be cleared and smcibdev(A)->lnk_cnt +will reach to zero. However, when dev_B is removed then, the link +group can't be found in smc_lgr_list and lnk_B won't be cleared, +making smcibdev->lnk_cnt never reaches zero, which causes a hung_task. + +This patch fixes this issue by restoring the implementation of +smc_smcr_terminate_all() to what it was before commit 349d43127dac +("net/smc: fix kernel panic caused by race of smc_sock"). The original +implementation also satisfies the intention that make sure QP destroy +earlier than CQ destroy because we will always wait for smcibdev->lnk_cnt +reaches zero, which guarantees QP has been destroyed. + +Fixes: 349d43127dac ("net/smc: fix kernel panic caused by race of smc_sock") +Signed-off-by: Wen Gu +Signed-off-by: David S. Miller +Signed-off-by: Greg Kroah-Hartman +--- + net/smc/smc_core.c | 17 +---------------- + 1 file changed, 1 insertion(+), 16 deletions(-) + +--- a/net/smc/smc_core.c ++++ b/net/smc/smc_core.c +@@ -1459,16 +1459,11 @@ void smc_smcd_terminate_all(struct smcd_ + /* Called when an SMCR device is removed or the smc module is unloaded. + * If smcibdev is given, all SMCR link groups using this device are terminated. + * If smcibdev is NULL, all SMCR link groups are terminated. +- * +- * We must wait here for QPs been destroyed before we destroy the CQs, +- * or we won't received any CQEs and cdc_pend_tx_wr cannot reach 0 thus +- * smc_sock cannot be released. + */ + void smc_smcr_terminate_all(struct smc_ib_device *smcibdev) + { + struct smc_link_group *lgr, *lg; + LIST_HEAD(lgr_free_list); +- LIST_HEAD(lgr_linkdown_list); + int i; + + spin_lock_bh(&smc_lgr_list.lock); +@@ -1480,7 +1475,7 @@ void smc_smcr_terminate_all(struct smc_i + list_for_each_entry_safe(lgr, lg, &smc_lgr_list.list, list) { + for (i = 0; i < SMC_LINKS_PER_LGR_MAX; i++) { + if (lgr->lnk[i].smcibdev == smcibdev) +- list_move_tail(&lgr->list, &lgr_linkdown_list); ++ smcr_link_down_cond_sched(&lgr->lnk[i]); + } + } + } +@@ -1492,16 +1487,6 @@ void smc_smcr_terminate_all(struct smc_i + __smc_lgr_terminate(lgr, false); + } + +- list_for_each_entry_safe(lgr, lg, &lgr_linkdown_list, list) { +- for (i = 0; i < SMC_LINKS_PER_LGR_MAX; i++) { +- if (lgr->lnk[i].smcibdev == smcibdev) { +- mutex_lock(&lgr->llc_conf_mutex); +- smcr_link_down_cond(&lgr->lnk[i]); +- mutex_unlock(&lgr->llc_conf_mutex); +- } +- } +- } +- + if (smcibdev) { + if (atomic_read(&smcibdev->lnk_cnt)) + wait_event(smcibdev->lnks_deleted, diff --git a/queue-5.16/pinctrl-rockchip-fix-gpio-device-creation.patch b/queue-5.16/pinctrl-rockchip-fix-gpio-device-creation.patch new file mode 100644 index 00000000000..6590d97485c --- /dev/null +++ b/queue-5.16/pinctrl-rockchip-fix-gpio-device-creation.patch @@ -0,0 +1,44 @@ +From bceb6732f3fd2a55d8f2e518cced1c7555e216b6 Mon Sep 17 00:00:00 2001 +From: John Keeping +Date: Fri, 26 Nov 2021 15:13:52 +0000 +Subject: pinctrl/rockchip: fix gpio device creation + +From: John Keeping + +commit bceb6732f3fd2a55d8f2e518cced1c7555e216b6 upstream. + +GPIO nodes are not themselves busses, so passing rockchip_bank_match +here is wrong. Passing NULL instead uses the standard bus match table +which is more appropriate. + +devm_of_platform_populate() shows that this is the normal way to call +of_platform_populate() from a device driver, so in order to match that +more closely also add the pinctrl device as the parent for the newly +created GPIO controllers. + +Specifically, using the wrong match here can break dynamic GPIO hogs as +marking the GPIO bank as a bus means that of_platform_notify() will set +OF_POPULATED on new child nodes and if this happens before +of_gpio_notify() is called then the new hog will be skipped as +OF_POPULATED is already set. + +Fixes: 9ce9a02039de ("pinctrl/rockchip: drop the gpio related codes") +Signed-off-by: John Keeping +Link: https://lore.kernel.org/r/20211126151352.1509583-1-john@metanate.com +Signed-off-by: Linus Walleij +Signed-off-by: Greg Kroah-Hartman +--- + drivers/pinctrl/pinctrl-rockchip.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/pinctrl/pinctrl-rockchip.c ++++ b/drivers/pinctrl/pinctrl-rockchip.c +@@ -2748,7 +2748,7 @@ static int rockchip_pinctrl_probe(struct + + platform_set_drvdata(pdev, info); + +- ret = of_platform_populate(np, rockchip_bank_match, NULL, NULL); ++ ret = of_platform_populate(np, NULL, NULL, &pdev->dev); + if (ret) { + dev_err(&pdev->dev, "failed to register gpio device\n"); + return ret; diff --git a/queue-5.16/series b/queue-5.16/series index 5b48b6a81bf..0dfe345ac70 100644 --- a/queue-5.16/series +++ b/queue-5.16/series @@ -959,3 +959,12 @@ f2fs-fix-to-reserve-space-for-io-align-feature.patch f2fs-fix-to-check-available-space-of-cp-area-correctly-in-update_ckpt_flags.patch crypto-octeontx2-uninitialized-variable-in-kvf_limits_store.patch af_unix-annote-lockless-accesses-to-unix_tot_inflight-gc_in_progress.patch +clk-emit-a-stern-warning-with-writable-debugfs-enabled.patch +clk-si5341-fix-clock-hw-provider-cleanup.patch +pinctrl-rockchip-fix-gpio-device-creation.patch +arm-dts-gpio-ranges-property-is-now-required.patch +gpio-mpc8xxx-fix-irq-check-in-mpc8xxx_probe.patch +gpio-idt3243x-fix-irq-check-in-idt_gpio_probe.patch +net-smc-fix-hung_task-when-removing-smc-r-devices.patch +net-axienet-increase-reset-timeout.patch +net-axienet-wait-for-phyrstcmplt-after-core-reset.patch