From: Greg Kroah-Hartman Date: Tue, 21 Jan 2014 01:03:09 +0000 (-0800) Subject: 3.10-stable patches X-Git-Tag: v3.10.28~18 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=a9b0c4d8f47222bdb30ea78335669284928d8a84;p=thirdparty%2Fkernel%2Fstable-queue.git 3.10-stable patches added patches: perf-scripting-perl-fix-build-error-on-fedora-12.patch perf-x86-amd-ibs-fix-waking-up-from-s3-for-amd-family-10h.patch --- diff --git a/queue-3.10/perf-scripting-perl-fix-build-error-on-fedora-12.patch b/queue-3.10/perf-scripting-perl-fix-build-error-on-fedora-12.patch new file mode 100644 index 00000000000..855069ca96e --- /dev/null +++ b/queue-3.10/perf-scripting-perl-fix-build-error-on-fedora-12.patch @@ -0,0 +1,56 @@ +From 3b16ff89676d9902dc39976aee3cb0314ee37d93 Mon Sep 17 00:00:00 2001 +From: Arnaldo Carvalho de Melo +Date: Mon, 14 Oct 2013 18:25:12 -0300 +Subject: perf scripting perl: Fix build error on Fedora 12 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Arnaldo Carvalho de Melo + +commit 3b16ff89676d9902dc39976aee3cb0314ee37d93 upstream. + +Cast __u64 to u64 to silence this warning on older distros, such as +Fedora 12: + + CC /tmp/build/perf/util/scripting-engines/trace-event-perl.o + cc1: warnings being treated as errors + util/scripting-engines/trace-event-perl.c: In function ‘perl_process_tracepoint’: + util/scripting-engines/trace-event-perl.c:285: error: format ‘%lu’ expects type ‘long unsigned int’, but argument 2 has type ‘__u64’ + make[1]: *** [/tmp/build/perf/util/scripting-engines/trace-event-perl.o] Error 1 + make: *** [install] Error 2 + make: Leaving directory `/home/acme/git/linux/tools/perf' + [acme@fedora12 linux]$ + +Reported-by: Waiman Long +Cc: Adrian Hunter +Cc: David Ahern +Cc: Frederic Weisbecker +Cc: Jiri Olsa +Cc: Mike Galbraith +Cc: Paul Mackerras +Cc: Peter Zijlstra +Cc: Stephane Eranian +Cc: Tom Zanussi +Cc: Waiman Long +Link: http://lkml.kernel.org/n/tip-nlxofdqcdjfm0w9o6bgq4kqv@git.kernel.org +Link: http://lkml.kernel.org/r/1381265120-58532-1-git-send-email-Waiman.Long@hp.com +Signed-off-by: Arnaldo Carvalho de Melo +Cc: Xie XiuQi +Signed-off-by: Greg Kroah-Hartman + +--- + tools/perf/util/scripting-engines/trace-event-perl.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/tools/perf/util/scripting-engines/trace-event-perl.c ++++ b/tools/perf/util/scripting-engines/trace-event-perl.c +@@ -282,7 +282,7 @@ static void perl_process_tracepoint(unio + + event = find_cache_event(evsel); + if (!event) +- die("ug! no event found for type %" PRIu64, evsel->attr.config); ++ die("ug! no event found for type %" PRIu64, (u64)evsel->attr.config); + + pid = raw_field_value(event, "common_pid", data); + diff --git a/queue-3.10/perf-x86-amd-ibs-fix-waking-up-from-s3-for-amd-family-10h.patch b/queue-3.10/perf-x86-amd-ibs-fix-waking-up-from-s3-for-amd-family-10h.patch new file mode 100644 index 00000000000..ded9f3683cc --- /dev/null +++ b/queue-3.10/perf-x86-amd-ibs-fix-waking-up-from-s3-for-amd-family-10h.patch @@ -0,0 +1,136 @@ +From bee09ed91cacdbffdbcd3b05de8409c77ec9fcd6 Mon Sep 17 00:00:00 2001 +From: Robert Richter +Date: Wed, 15 Jan 2014 15:57:29 +0100 +Subject: perf/x86/amd/ibs: Fix waking up from S3 for AMD family 10h + +From: Robert Richter + +commit bee09ed91cacdbffdbcd3b05de8409c77ec9fcd6 upstream. + +On AMD family 10h we see following error messages while waking up from +S3 for all non-boot CPUs leading to a failed IBS initialization: + + Enabling non-boot CPUs ... + smpboot: Booting Node 0 Processor 1 APIC 0x1 + [Firmware Bug]: cpu 1, try to use APIC500 (LVT offset 0) for vector 0x400, but the register is already in use for vector 0xf9 on another cpu + perf: IBS APIC setup failed on cpu #1 + process: Switch to broadcast mode on CPU1 + CPU1 is up + ... + ACPI: Waking up from system sleep state S3 + +Reason for this is that during suspend the LVT offset for the IBS +vector gets lost and needs to be reinialized while resuming. + +The offset is read from the IBSCTL msr. On family 10h the offset needs +to be 1 as offset 0 is used for the MCE threshold interrupt, but +firmware assings it for IBS to 0 too. The kernel needs to reprogram +the vector. The msr is a readonly node msr, but a new value can be +written via pci config space access. The reinitialization is +implemented for family 10h in setup_ibs_ctl() which is forced during +IBS setup. + +This patch fixes IBS setup after waking up from S3 by adding +resume/supend hooks for the boot cpu which does the offset +reinitialization. + +Marking it as stable to let distros pick up this fix. + +Signed-off-by: Robert Richter +Signed-off-by: Peter Zijlstra +Cc: Linus Torvalds +Link: http://lkml.kernel.org/r/1389797849-5565-1-git-send-email-rric.net@gmail.com +Signed-off-by: Ingo Molnar +Signed-off-by: Greg Kroah-Hartman + +--- + arch/x86/kernel/cpu/perf_event_amd_ibs.c | 53 ++++++++++++++++++++++++++----- + 1 file changed, 45 insertions(+), 8 deletions(-) + +--- a/arch/x86/kernel/cpu/perf_event_amd_ibs.c ++++ b/arch/x86/kernel/cpu/perf_event_amd_ibs.c +@@ -10,6 +10,7 @@ + #include + #include + #include ++#include + + #include + +@@ -816,6 +817,18 @@ out: + return ret; + } + ++static void ibs_eilvt_setup(void) ++{ ++ /* ++ * Force LVT offset assignment for family 10h: The offsets are ++ * not assigned by the BIOS for this family, so the OS is ++ * responsible for doing it. If the OS assignment fails, fall ++ * back to BIOS settings and try to setup this. ++ */ ++ if (boot_cpu_data.x86 == 0x10) ++ force_ibs_eilvt_setup(); ++} ++ + static inline int get_ibs_lvt_offset(void) + { + u64 val; +@@ -851,6 +864,36 @@ static void clear_APIC_ibs(void *dummy) + setup_APIC_eilvt(offset, 0, APIC_EILVT_MSG_FIX, 1); + } + ++#ifdef CONFIG_PM ++ ++static int perf_ibs_suspend(void) ++{ ++ clear_APIC_ibs(NULL); ++ return 0; ++} ++ ++static void perf_ibs_resume(void) ++{ ++ ibs_eilvt_setup(); ++ setup_APIC_ibs(NULL); ++} ++ ++static struct syscore_ops perf_ibs_syscore_ops = { ++ .resume = perf_ibs_resume, ++ .suspend = perf_ibs_suspend, ++}; ++ ++static void perf_ibs_pm_init(void) ++{ ++ register_syscore_ops(&perf_ibs_syscore_ops); ++} ++ ++#else ++ ++static inline void perf_ibs_pm_init(void) { } ++ ++#endif ++ + static int __cpuinit + perf_ibs_cpu_notifier(struct notifier_block *self, unsigned long action, void *hcpu) + { +@@ -877,18 +920,12 @@ static __init int amd_ibs_init(void) + if (!caps) + return -ENODEV; /* ibs not supported by the cpu */ + +- /* +- * Force LVT offset assignment for family 10h: The offsets are +- * not assigned by the BIOS for this family, so the OS is +- * responsible for doing it. If the OS assignment fails, fall +- * back to BIOS settings and try to setup this. +- */ +- if (boot_cpu_data.x86 == 0x10) +- force_ibs_eilvt_setup(); ++ ibs_eilvt_setup(); + + if (!ibs_eilvt_valid()) + goto out; + ++ perf_ibs_pm_init(); + get_online_cpus(); + ibs_caps = caps; + /* make ibs_caps visible to other cpus: */ diff --git a/queue-3.10/series b/queue-3.10/series index ea724780b6b..0fcff209c85 100644 --- a/queue-3.10/series +++ b/queue-3.10/series @@ -1 +1,3 @@ arm-7815-1-kexec-offline-non-panic-cpus-on-kdump-panic.patch +perf-scripting-perl-fix-build-error-on-fedora-12.patch +perf-x86-amd-ibs-fix-waking-up-from-s3-for-amd-family-10h.patch