From: H.J. Lu <hjl.tools@gmail.com>
Date: Wed, 5 Apr 2023 16:21:34 +0000 (-0700)
Subject: <sys/platform/x86.h>: Add LASS support
X-Git-Tag: glibc-2.38~405
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=aa528a579b3fc98eab43986619087cafe3f260d0;p=thirdparty%2Fglibc.git

<sys/platform/x86.h>: Add LASS support

Add Linear Address Space Separation (LASS) support to <sys/platform/x86.h>.
Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
---

diff --git a/manual/platform.texi b/manual/platform.texi
index a6e33b1572f..be04194c884 100644
--- a/manual/platform.texi
+++ b/manual/platform.texi
@@ -406,6 +406,9 @@ the indirect branch predictor barrier (IBPB).
 @item
 @code{LAM} -- Linear Address Masking.
 
+@item
+@code{LASS} -- Linear Address Space Separation.
+
 @item
 @code{LBR} -- Architectural LBR.
 
diff --git a/sysdeps/x86/bits/platform/x86.h b/sysdeps/x86/bits/platform/x86.h
index 6fc3b69651c..c9ee8fcf90a 100644
--- a/sysdeps/x86/bits/platform/x86.h
+++ b/sysdeps/x86/bits/platform/x86.h
@@ -291,6 +291,7 @@ enum
   x86_cpu_RAO_INT		= x86_cpu_index_7_ecx_1_eax + 3,
   x86_cpu_AVX_VNNI		= x86_cpu_index_7_ecx_1_eax + 4,
   x86_cpu_AVX512_BF16		= x86_cpu_index_7_ecx_1_eax + 5,
+  x86_cpu_LASS			= x86_cpu_index_7_ecx_1_eax + 6,
   x86_cpu_FZLRM			= x86_cpu_index_7_ecx_1_eax + 10,
   x86_cpu_FSRS			= x86_cpu_index_7_ecx_1_eax + 11,
   x86_cpu_FSRCS			= x86_cpu_index_7_ecx_1_eax + 12,
diff --git a/sysdeps/x86/tst-get-cpu-features.c b/sysdeps/x86/tst-get-cpu-features.c
index 6a3f29db98c..9da561a5596 100644
--- a/sysdeps/x86/tst-get-cpu-features.c
+++ b/sysdeps/x86/tst-get-cpu-features.c
@@ -203,6 +203,7 @@ do_test (void)
   CHECK_CPU_FEATURE_PRESENT (RAO_INT);
   CHECK_CPU_FEATURE_PRESENT (AVX_VNNI);
   CHECK_CPU_FEATURE_PRESENT (AVX512_BF16);
+  CHECK_CPU_FEATURE_PRESENT (LASS);
   CHECK_CPU_FEATURE_PRESENT (FZLRM);
   CHECK_CPU_FEATURE_PRESENT (FSRS);
   CHECK_CPU_FEATURE_PRESENT (FSRCS);