From: Greg Kroah-Hartman Date: Mon, 20 Jul 2020 11:23:57 +0000 (+0200) Subject: 5.4-stable patches X-Git-Tag: v4.4.231~32 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=aacc4d274d2fefb0c609e04ead581091e7c3617a;p=thirdparty%2Fkernel%2Fstable-queue.git 5.4-stable patches added patches: clk-qcom-gcc-add-gpu-and-npu-clocks-for-sm8150.patch clk-qcom-gcc-add-missing-ufs-clocks-for-sm8150.patch hid-logitech-hidpp-avoid-repeated-multiplier-log-messages.patch mtd-rawnand-brcmnand-correctly-verify-erased-pages.patch mtd-rawnand-brcmnand-fix-cs0-layout.patch mtd-rawnand-marvell-fix-probe-error-path.patch mtd-rawnand-marvell-fix-the-condition-on-a-return-code.patch mtd-rawnand-marvell-use-nand_cleanup-when-the-device-is-not-yet-registered.patch mtd-rawnand-oxnas-keep-track-of-registered-devices.patch mtd-rawnand-oxnas-release-all-devices-in-the-_remove-path.patch mtd-rawnand-oxnas-unregister-all-devices-on-error.patch mtd-rawnand-timings-fix-default-tr_max-and-tccs_min-timings.patch slimbus-core-fix-mismatch-in-of_node_get-put.patch --- diff --git a/queue-5.4/clk-qcom-gcc-add-gpu-and-npu-clocks-for-sm8150.patch b/queue-5.4/clk-qcom-gcc-add-gpu-and-npu-clocks-for-sm8150.patch new file mode 100644 index 00000000000..a09918988ad --- /dev/null +++ b/queue-5.4/clk-qcom-gcc-add-gpu-and-npu-clocks-for-sm8150.patch @@ -0,0 +1,115 @@ +From f73a4230d5bbc8fc7e1a2479ac997f786111c7bb Mon Sep 17 00:00:00 2001 +From: Vinod Koul +Date: Wed, 13 May 2020 12:24:19 +0530 +Subject: clk: qcom: gcc: Add GPU and NPU clocks for SM8150 + +From: Vinod Koul + +commit f73a4230d5bbc8fc7e1a2479ac997f786111c7bb upstream. + +Add the GPU and NPU clocks for SM8150. They were missed in earlier +addition of clock driver. + +Fixes: 2a1d7eb854bb ("clk: qcom: gcc: Add global clock controller driver for SM8150") +Signed-off-by: Vinod Koul +Link: https://lkml.kernel.org/r/20200513065420.32735-1-vkoul@kernel.org +Signed-off-by: Stephen Boyd +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/qcom/gcc-sm8150.c | 64 ++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 64 insertions(+) + +--- a/drivers/clk/qcom/gcc-sm8150.c ++++ b/drivers/clk/qcom/gcc-sm8150.c +@@ -1615,6 +1615,36 @@ static struct clk_branch gcc_gpu_cfg_ahb + }, + }; + ++static struct clk_branch gcc_gpu_gpll0_clk_src = { ++ .clkr = { ++ .enable_reg = 0x52004, ++ .enable_mask = BIT(15), ++ .hw.init = &(struct clk_init_data){ ++ .name = "gcc_gpu_gpll0_clk_src", ++ .parent_hws = (const struct clk_hw *[]){ ++ &gpll0.clkr.hw }, ++ .num_parents = 1, ++ .flags = CLK_SET_RATE_PARENT, ++ .ops = &clk_branch2_ops, ++ }, ++ }, ++}; ++ ++static struct clk_branch gcc_gpu_gpll0_div_clk_src = { ++ .clkr = { ++ .enable_reg = 0x52004, ++ .enable_mask = BIT(16), ++ .hw.init = &(struct clk_init_data){ ++ .name = "gcc_gpu_gpll0_div_clk_src", ++ .parent_hws = (const struct clk_hw *[]){ ++ &gcc_gpu_gpll0_clk_src.clkr.hw }, ++ .num_parents = 1, ++ .flags = CLK_SET_RATE_PARENT, ++ .ops = &clk_branch2_ops, ++ }, ++ }, ++}; ++ + static struct clk_branch gcc_gpu_iref_clk = { + .halt_reg = 0x8c010, + .halt_check = BRANCH_HALT, +@@ -1697,6 +1727,36 @@ static struct clk_branch gcc_npu_cfg_ahb + }, + }; + ++static struct clk_branch gcc_npu_gpll0_clk_src = { ++ .clkr = { ++ .enable_reg = 0x52004, ++ .enable_mask = BIT(18), ++ .hw.init = &(struct clk_init_data){ ++ .name = "gcc_npu_gpll0_clk_src", ++ .parent_hws = (const struct clk_hw *[]){ ++ &gpll0.clkr.hw }, ++ .num_parents = 1, ++ .flags = CLK_SET_RATE_PARENT, ++ .ops = &clk_branch2_ops, ++ }, ++ }, ++}; ++ ++static struct clk_branch gcc_npu_gpll0_div_clk_src = { ++ .clkr = { ++ .enable_reg = 0x52004, ++ .enable_mask = BIT(19), ++ .hw.init = &(struct clk_init_data){ ++ .name = "gcc_npu_gpll0_div_clk_src", ++ .parent_hws = (const struct clk_hw *[]){ ++ &gcc_npu_gpll0_clk_src.clkr.hw }, ++ .num_parents = 1, ++ .flags = CLK_SET_RATE_PARENT, ++ .ops = &clk_branch2_ops, ++ }, ++ }, ++}; ++ + static struct clk_branch gcc_npu_trig_clk = { + .halt_reg = 0x4d00c, + .halt_check = BRANCH_VOTED, +@@ -3331,12 +3391,16 @@ static struct clk_regmap *gcc_sm8150_clo + [GCC_GP3_CLK] = &gcc_gp3_clk.clkr, + [GCC_GP3_CLK_SRC] = &gcc_gp3_clk_src.clkr, + [GCC_GPU_CFG_AHB_CLK] = &gcc_gpu_cfg_ahb_clk.clkr, ++ [GCC_GPU_GPLL0_CLK_SRC] = &gcc_gpu_gpll0_clk_src.clkr, ++ [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr, + [GCC_GPU_IREF_CLK] = &gcc_gpu_iref_clk.clkr, + [GCC_GPU_MEMNOC_GFX_CLK] = &gcc_gpu_memnoc_gfx_clk.clkr, + [GCC_GPU_SNOC_DVM_GFX_CLK] = &gcc_gpu_snoc_dvm_gfx_clk.clkr, + [GCC_NPU_AT_CLK] = &gcc_npu_at_clk.clkr, + [GCC_NPU_AXI_CLK] = &gcc_npu_axi_clk.clkr, + [GCC_NPU_CFG_AHB_CLK] = &gcc_npu_cfg_ahb_clk.clkr, ++ [GCC_NPU_GPLL0_CLK_SRC] = &gcc_npu_gpll0_clk_src.clkr, ++ [GCC_NPU_GPLL0_DIV_CLK_SRC] = &gcc_npu_gpll0_div_clk_src.clkr, + [GCC_NPU_TRIG_CLK] = &gcc_npu_trig_clk.clkr, + [GCC_PCIE0_PHY_REFGEN_CLK] = &gcc_pcie0_phy_refgen_clk.clkr, + [GCC_PCIE1_PHY_REFGEN_CLK] = &gcc_pcie1_phy_refgen_clk.clkr, diff --git a/queue-5.4/clk-qcom-gcc-add-missing-ufs-clocks-for-sm8150.patch b/queue-5.4/clk-qcom-gcc-add-missing-ufs-clocks-for-sm8150.patch new file mode 100644 index 00000000000..f6ee9e8090f --- /dev/null +++ b/queue-5.4/clk-qcom-gcc-add-missing-ufs-clocks-for-sm8150.patch @@ -0,0 +1,136 @@ +From 37c72e4cae37f0dace1abb3711ede7fbc6d0862a Mon Sep 17 00:00:00 2001 +From: Vinod Koul +Date: Wed, 13 May 2020 12:24:20 +0530 +Subject: clk: qcom: gcc: Add missing UFS clocks for SM8150 + +From: Vinod Koul + +commit 37c72e4cae37f0dace1abb3711ede7fbc6d0862a upstream. + +Add the missing ufs card and ufs phy clocks for SM8150. They were missed +in earlier addition of clock driver. + +Fixes: 2a1d7eb854bb ("clk: qcom: gcc: Add global clock controller driver for SM8150") +Signed-off-by: Vinod Koul +Link: https://lkml.kernel.org/r/20200513065420.32735-2-vkoul@kernel.org +Signed-off-by: Stephen Boyd +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/qcom/gcc-sm8150.c | 84 ++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 84 insertions(+) + +--- a/drivers/clk/qcom/gcc-sm8150.c ++++ b/drivers/clk/qcom/gcc-sm8150.c +@@ -2871,6 +2871,45 @@ static struct clk_branch gcc_ufs_card_ph + }, + }; + ++/* external clocks so add BRANCH_HALT_SKIP */ ++static struct clk_branch gcc_ufs_card_rx_symbol_0_clk = { ++ .halt_check = BRANCH_HALT_SKIP, ++ .clkr = { ++ .enable_reg = 0x7501c, ++ .enable_mask = BIT(0), ++ .hw.init = &(struct clk_init_data){ ++ .name = "gcc_ufs_card_rx_symbol_0_clk", ++ .ops = &clk_branch2_ops, ++ }, ++ }, ++}; ++ ++/* external clocks so add BRANCH_HALT_SKIP */ ++static struct clk_branch gcc_ufs_card_rx_symbol_1_clk = { ++ .halt_check = BRANCH_HALT_SKIP, ++ .clkr = { ++ .enable_reg = 0x750ac, ++ .enable_mask = BIT(0), ++ .hw.init = &(struct clk_init_data){ ++ .name = "gcc_ufs_card_rx_symbol_1_clk", ++ .ops = &clk_branch2_ops, ++ }, ++ }, ++}; ++ ++/* external clocks so add BRANCH_HALT_SKIP */ ++static struct clk_branch gcc_ufs_card_tx_symbol_0_clk = { ++ .halt_check = BRANCH_HALT_SKIP, ++ .clkr = { ++ .enable_reg = 0x75018, ++ .enable_mask = BIT(0), ++ .hw.init = &(struct clk_init_data){ ++ .name = "gcc_ufs_card_tx_symbol_0_clk", ++ .ops = &clk_branch2_ops, ++ }, ++ }, ++}; ++ + static struct clk_branch gcc_ufs_card_unipro_core_clk = { + .halt_reg = 0x75058, + .halt_check = BRANCH_HALT, +@@ -3051,6 +3090,45 @@ static struct clk_branch gcc_ufs_phy_phy + }, + }; + ++/* external clocks so add BRANCH_HALT_SKIP */ ++static struct clk_branch gcc_ufs_phy_rx_symbol_0_clk = { ++ .halt_check = BRANCH_HALT_SKIP, ++ .clkr = { ++ .enable_reg = 0x7701c, ++ .enable_mask = BIT(0), ++ .hw.init = &(struct clk_init_data){ ++ .name = "gcc_ufs_phy_rx_symbol_0_clk", ++ .ops = &clk_branch2_ops, ++ }, ++ }, ++}; ++ ++/* external clocks so add BRANCH_HALT_SKIP */ ++static struct clk_branch gcc_ufs_phy_rx_symbol_1_clk = { ++ .halt_check = BRANCH_HALT_SKIP, ++ .clkr = { ++ .enable_reg = 0x770ac, ++ .enable_mask = BIT(0), ++ .hw.init = &(struct clk_init_data){ ++ .name = "gcc_ufs_phy_rx_symbol_1_clk", ++ .ops = &clk_branch2_ops, ++ }, ++ }, ++}; ++ ++/* external clocks so add BRANCH_HALT_SKIP */ ++static struct clk_branch gcc_ufs_phy_tx_symbol_0_clk = { ++ .halt_check = BRANCH_HALT_SKIP, ++ .clkr = { ++ .enable_reg = 0x77018, ++ .enable_mask = BIT(0), ++ .hw.init = &(struct clk_init_data){ ++ .name = "gcc_ufs_phy_tx_symbol_0_clk", ++ .ops = &clk_branch2_ops, ++ }, ++ }, ++}; ++ + static struct clk_branch gcc_ufs_phy_unipro_core_clk = { + .halt_reg = 0x77058, + .halt_check = BRANCH_HALT, +@@ -3505,6 +3583,9 @@ static struct clk_regmap *gcc_sm8150_clo + [GCC_UFS_CARD_PHY_AUX_CLK_SRC] = &gcc_ufs_card_phy_aux_clk_src.clkr, + [GCC_UFS_CARD_PHY_AUX_HW_CTL_CLK] = + &gcc_ufs_card_phy_aux_hw_ctl_clk.clkr, ++ [GCC_UFS_CARD_RX_SYMBOL_0_CLK] = &gcc_ufs_card_rx_symbol_0_clk.clkr, ++ [GCC_UFS_CARD_RX_SYMBOL_1_CLK] = &gcc_ufs_card_rx_symbol_1_clk.clkr, ++ [GCC_UFS_CARD_TX_SYMBOL_0_CLK] = &gcc_ufs_card_tx_symbol_0_clk.clkr, + [GCC_UFS_CARD_UNIPRO_CORE_CLK] = &gcc_ufs_card_unipro_core_clk.clkr, + [GCC_UFS_CARD_UNIPRO_CORE_CLK_SRC] = + &gcc_ufs_card_unipro_core_clk_src.clkr, +@@ -3522,6 +3603,9 @@ static struct clk_regmap *gcc_sm8150_clo + [GCC_UFS_PHY_PHY_AUX_CLK] = &gcc_ufs_phy_phy_aux_clk.clkr, + [GCC_UFS_PHY_PHY_AUX_CLK_SRC] = &gcc_ufs_phy_phy_aux_clk_src.clkr, + [GCC_UFS_PHY_PHY_AUX_HW_CTL_CLK] = &gcc_ufs_phy_phy_aux_hw_ctl_clk.clkr, ++ [GCC_UFS_PHY_RX_SYMBOL_0_CLK] = &gcc_ufs_phy_rx_symbol_0_clk.clkr, ++ [GCC_UFS_PHY_RX_SYMBOL_1_CLK] = &gcc_ufs_phy_rx_symbol_1_clk.clkr, ++ [GCC_UFS_PHY_TX_SYMBOL_0_CLK] = &gcc_ufs_phy_tx_symbol_0_clk.clkr, + [GCC_UFS_PHY_UNIPRO_CORE_CLK] = &gcc_ufs_phy_unipro_core_clk.clkr, + [GCC_UFS_PHY_UNIPRO_CORE_CLK_SRC] = + &gcc_ufs_phy_unipro_core_clk_src.clkr, diff --git a/queue-5.4/hid-logitech-hidpp-avoid-repeated-multiplier-log-messages.patch b/queue-5.4/hid-logitech-hidpp-avoid-repeated-multiplier-log-messages.patch new file mode 100644 index 00000000000..e62ac04fef7 --- /dev/null +++ b/queue-5.4/hid-logitech-hidpp-avoid-repeated-multiplier-log-messages.patch @@ -0,0 +1,39 @@ +From e13762abf38ead29071407f32b9dcec38f21dc34 Mon Sep 17 00:00:00 2001 +From: "Maciej S. Szmigiero" +Date: Sun, 5 Jul 2020 19:34:57 +0200 +Subject: HID: logitech-hidpp: avoid repeated "multiplier = " log messages + +From: Maciej S. Szmigiero + +commit e13762abf38ead29071407f32b9dcec38f21dc34 upstream. + +These messages appear each time the mouse wakes from sleep, in my case +(Logitech M705), every minute or so. +Let's downgrade them to the "debug" level so they don't fill the kernel log +by default. + +While we are at it, let's make clear that this is a wheel multiplier (and +not, for example, XY movement multiplier). + +Fixes: 4435ff2f09a2 ("HID: logitech: Enable high-resolution scrolling on Logitech mice") +Cc: stable@vger.kernel.org +Signed-off-by: Maciej S. Szmigiero +Reviewed-by: Harry Cutts +Signed-off-by: Jiri Kosina +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/hid/hid-logitech-hidpp.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/hid/hid-logitech-hidpp.c ++++ b/drivers/hid/hid-logitech-hidpp.c +@@ -2964,7 +2964,7 @@ static int hi_res_scroll_enable(struct h + multiplier = 1; + + hidpp->vertical_wheel_counter.wheel_multiplier = multiplier; +- hid_info(hidpp->hid_dev, "multiplier = %d\n", multiplier); ++ hid_dbg(hidpp->hid_dev, "wheel multiplier = %d\n", multiplier); + return 0; + } + diff --git a/queue-5.4/mtd-rawnand-brcmnand-correctly-verify-erased-pages.patch b/queue-5.4/mtd-rawnand-brcmnand-correctly-verify-erased-pages.patch new file mode 100644 index 00000000000..5a103bd17b0 --- /dev/null +++ b/queue-5.4/mtd-rawnand-brcmnand-correctly-verify-erased-pages.patch @@ -0,0 +1,69 @@ +From dcb351c03f2fa6a599de1061b174167e03ee312b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Tue, 12 May 2020 10:24:51 +0200 +Subject: mtd: rawnand: brcmnand: correctly verify erased pages +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Álvaro Fernández Rojas + +commit dcb351c03f2fa6a599de1061b174167e03ee312b upstream. + +The current code checks that the whole OOB area is erased. +This is a problem when JFFS2 cleanmarkers are added to the OOB, since it will +fail due to the usable OOB bytes not being 0xff. +Correct this by only checking that data and ECC bytes aren't 0xff. + +Fixes: 02b88eea9f9c ("mtd: brcmnand: Add check for erased page bitflips") +Signed-off-by: Álvaro Fernández Rojas +Signed-off-by: Miquel Raynal +Link: https://lore.kernel.org/linux-mtd/20200512082451.771212-1-noltari@gmail.com +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/mtd/nand/raw/brcmnand/brcmnand.c | 19 +++++++++++-------- + 1 file changed, 11 insertions(+), 8 deletions(-) + +--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c ++++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c +@@ -1790,28 +1790,31 @@ static int brcmnand_read_by_pio(struct m + static int brcmstb_nand_verify_erased_page(struct mtd_info *mtd, + struct nand_chip *chip, void *buf, u64 addr) + { +- int i, sas; +- void *oob = chip->oob_poi; ++ struct mtd_oob_region ecc; ++ int i; + int bitflips = 0; + int page = addr >> chip->page_shift; + int ret; ++ void *ecc_bytes; + void *ecc_chunk; + + if (!buf) + buf = nand_get_data_buf(chip); + +- sas = mtd->oobsize / chip->ecc.steps; +- + /* read without ecc for verification */ + ret = chip->ecc.read_page_raw(chip, buf, true, page); + if (ret) + return ret; + +- for (i = 0; i < chip->ecc.steps; i++, oob += sas) { ++ for (i = 0; i < chip->ecc.steps; i++) { + ecc_chunk = buf + chip->ecc.size * i; +- ret = nand_check_erased_ecc_chunk(ecc_chunk, +- chip->ecc.size, +- oob, sas, NULL, 0, ++ ++ mtd_ooblayout_ecc(mtd, i, &ecc); ++ ecc_bytes = chip->oob_poi + ecc.offset; ++ ++ ret = nand_check_erased_ecc_chunk(ecc_chunk, chip->ecc.size, ++ ecc_bytes, ecc.length, ++ NULL, 0, + chip->ecc.strength); + if (ret < 0) + return ret; diff --git a/queue-5.4/mtd-rawnand-brcmnand-fix-cs0-layout.patch b/queue-5.4/mtd-rawnand-brcmnand-fix-cs0-layout.patch new file mode 100644 index 00000000000..cab2a3dc853 --- /dev/null +++ b/queue-5.4/mtd-rawnand-brcmnand-fix-cs0-layout.patch @@ -0,0 +1,40 @@ +From 3d3fb3c5be9ce07fa85d8f67fb3922e4613b955b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Fri, 22 May 2020 14:15:21 +0200 +Subject: mtd: rawnand: brcmnand: fix CS0 layout +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Álvaro Fernández Rojas + +commit 3d3fb3c5be9ce07fa85d8f67fb3922e4613b955b upstream. + +Only v3.3-v5.0 have a different CS0 layout. +Controllers before v3.3 use the same layout for every CS. + +Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB NAND controller") +Signed-off-by: Álvaro Fernández Rojas +Acked-by: Florian Fainelli +Signed-off-by: Miquel Raynal +Link: https://lore.kernel.org/linux-mtd/20200522121524.4161539-3-noltari@gmail.com +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/mtd/nand/raw/brcmnand/brcmnand.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c ++++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c +@@ -537,8 +537,9 @@ static int brcmnand_revision_init(struct + } else { + ctrl->cs_offsets = brcmnand_cs_offsets; + +- /* v5.0 and earlier has a different CS0 offset layout */ +- if (ctrl->nand_version <= 0x0500) ++ /* v3.3-5.0 have a different CS0 offset layout */ ++ if (ctrl->nand_version >= 0x0303 && ++ ctrl->nand_version <= 0x0500) + ctrl->cs0_offsets = brcmnand_cs_offsets_cs0; + } + diff --git a/queue-5.4/mtd-rawnand-marvell-fix-probe-error-path.patch b/queue-5.4/mtd-rawnand-marvell-fix-probe-error-path.patch new file mode 100644 index 00000000000..0d84d861b27 --- /dev/null +++ b/queue-5.4/mtd-rawnand-marvell-fix-probe-error-path.patch @@ -0,0 +1,67 @@ +From c525b7af96714f72e316c70781570a4a3e1c2856 Mon Sep 17 00:00:00 2001 +From: Miquel Raynal +Date: Fri, 24 Apr 2020 18:44:59 +0200 +Subject: mtd: rawnand: marvell: Fix probe error path + +From: Miquel Raynal + +commit c525b7af96714f72e316c70781570a4a3e1c2856 upstream. + +Ensure all chips are deregistered and cleaned in case of error during +the probe. + +Fixes: 02f26ecf8c77 ("mtd: nand: add reworked Marvell NAND controller driver") +Signed-off-by: Miquel Raynal +Reviewed-by: Boris Brezillon +Link: https://lore.kernel.org/linux-mtd/20200424164501.26719-5-miquel.raynal@bootlin.com +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/mtd/nand/raw/marvell_nand.c | 23 ++++++++++++++--------- + 1 file changed, 14 insertions(+), 9 deletions(-) + +--- a/drivers/mtd/nand/raw/marvell_nand.c ++++ b/drivers/mtd/nand/raw/marvell_nand.c +@@ -2673,6 +2673,16 @@ static int marvell_nand_chip_init(struct + return 0; + } + ++static void marvell_nand_chips_cleanup(struct marvell_nfc *nfc) ++{ ++ struct marvell_nand_chip *entry, *temp; ++ ++ list_for_each_entry_safe(entry, temp, &nfc->chips, node) { ++ nand_release(&entry->chip); ++ list_del(&entry->node); ++ } ++} ++ + static int marvell_nand_chips_init(struct device *dev, struct marvell_nfc *nfc) + { + struct device_node *np = dev->of_node; +@@ -2707,21 +2717,16 @@ static int marvell_nand_chips_init(struc + ret = marvell_nand_chip_init(dev, nfc, nand_np); + if (ret) { + of_node_put(nand_np); +- return ret; ++ goto cleanup_chips; + } + } + + return 0; +-} + +-static void marvell_nand_chips_cleanup(struct marvell_nfc *nfc) +-{ +- struct marvell_nand_chip *entry, *temp; ++cleanup_chips: ++ marvell_nand_chips_cleanup(nfc); + +- list_for_each_entry_safe(entry, temp, &nfc->chips, node) { +- nand_release(&entry->chip); +- list_del(&entry->node); +- } ++ return ret; + } + + static int marvell_nfc_init_dma(struct marvell_nfc *nfc) diff --git a/queue-5.4/mtd-rawnand-marvell-fix-the-condition-on-a-return-code.patch b/queue-5.4/mtd-rawnand-marvell-fix-the-condition-on-a-return-code.patch new file mode 100644 index 00000000000..877504b9236 --- /dev/null +++ b/queue-5.4/mtd-rawnand-marvell-fix-the-condition-on-a-return-code.patch @@ -0,0 +1,51 @@ +From c27075772d1f1c8aaf276db9943b35adda8a8b65 Mon Sep 17 00:00:00 2001 +From: Miquel Raynal +Date: Fri, 24 Apr 2020 18:44:56 +0200 +Subject: mtd: rawnand: marvell: Fix the condition on a return code + +From: Miquel Raynal + +commit c27075772d1f1c8aaf276db9943b35adda8a8b65 upstream. + +In a previous fix, I changed the condition on which the timeout of an +IRQ is reached from: + + if (!ret) + +into: + + if (ret && !pending) + +While having a non-zero return code is usual in the Linux kernel, here +ret comes from a wait_for_completion_timeout() which returns 0 when +the waiting period is too long. + +Hence, the revised condition should be: + + if (!ret && !pending) + +The faulty patch did not produce any error because of the !pending +condition so this change is finally purely cosmetic and does not +change the actual driver behavior. + +Fixes: cafb56dd741e ("mtd: rawnand: marvell: prevent timeouts on a loaded machine") +Signed-off-by: Miquel Raynal +Reviewed-by: Boris Brezillon +Link: https://lore.kernel.org/linux-mtd/20200424164501.26719-2-miquel.raynal@bootlin.com +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/mtd/nand/raw/marvell_nand.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/mtd/nand/raw/marvell_nand.c ++++ b/drivers/mtd/nand/raw/marvell_nand.c +@@ -707,7 +707,7 @@ static int marvell_nfc_wait_op(struct na + * In case the interrupt was not served in the required time frame, + * check if the ISR was not served or if something went actually wrong. + */ +- if (ret && !pending) { ++ if (!ret && !pending) { + dev_err(nfc->dev, "Timeout waiting for RB signal\n"); + return -ETIMEDOUT; + } diff --git a/queue-5.4/mtd-rawnand-marvell-use-nand_cleanup-when-the-device-is-not-yet-registered.patch b/queue-5.4/mtd-rawnand-marvell-use-nand_cleanup-when-the-device-is-not-yet-registered.patch new file mode 100644 index 00000000000..678eb24947e --- /dev/null +++ b/queue-5.4/mtd-rawnand-marvell-use-nand_cleanup-when-the-device-is-not-yet-registered.patch @@ -0,0 +1,33 @@ +From 7a0c18fb5c71c6ac7d4662a145e4227dcd4a36a3 Mon Sep 17 00:00:00 2001 +From: Miquel Raynal +Date: Fri, 24 Apr 2020 18:44:58 +0200 +Subject: mtd: rawnand: marvell: Use nand_cleanup() when the device is not yet registered + +From: Miquel Raynal + +commit 7a0c18fb5c71c6ac7d4662a145e4227dcd4a36a3 upstream. + +Do not call nand_release() while the MTD device has not been +registered, use nand_cleanup() instead. + +Fixes: 02f26ecf8c77 ("mtd: nand: add reworked Marvell NAND controller driver") +Signed-off-by: Miquel Raynal +Reviewed-by: Boris Brezillon +Link: https://lore.kernel.org/linux-mtd/20200424164501.26719-4-miquel.raynal@bootlin.com +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/mtd/nand/raw/marvell_nand.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/mtd/nand/raw/marvell_nand.c ++++ b/drivers/mtd/nand/raw/marvell_nand.c +@@ -2664,7 +2664,7 @@ static int marvell_nand_chip_init(struct + ret = mtd_device_register(mtd, NULL, 0); + if (ret) { + dev_err(dev, "failed to register mtd device: %d\n", ret); +- nand_release(chip); ++ nand_cleanup(chip); + return ret; + } + diff --git a/queue-5.4/mtd-rawnand-oxnas-keep-track-of-registered-devices.patch b/queue-5.4/mtd-rawnand-oxnas-keep-track-of-registered-devices.patch new file mode 100644 index 00000000000..0ff3f1dd34d --- /dev/null +++ b/queue-5.4/mtd-rawnand-oxnas-keep-track-of-registered-devices.patch @@ -0,0 +1,58 @@ +From 383fc3f613e7eac9f2e3c13b6f9fb8c1f39cb9d5 Mon Sep 17 00:00:00 2001 +From: Miquel Raynal +Date: Tue, 19 May 2020 15:00:08 +0200 +Subject: mtd: rawnand: oxnas: Keep track of registered devices + +From: Miquel Raynal + +commit 383fc3f613e7eac9f2e3c13b6f9fb8c1f39cb9d5 upstream. + +All initialized and registered devices should be listed somewhere so +that we can unregister/free them in the _remove() path. + +This patch is not a fix per-se but is needed to apply three other +fixes coming right after, explaining the Fixes/Cc: stable tags. + +Fixes: 668592492409 ("mtd: nand: Add OX820 NAND Support") +Signed-off-by: Miquel Raynal +Link: https://lore.kernel.org/linux-mtd/20200519130035.1883-36-miquel.raynal@bootlin.com +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/mtd/nand/raw/oxnas_nand.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/mtd/nand/raw/oxnas_nand.c ++++ b/drivers/mtd/nand/raw/oxnas_nand.c +@@ -32,6 +32,7 @@ struct oxnas_nand_ctrl { + void __iomem *io_base; + struct clk *clk; + struct nand_chip *chips[OXNAS_NAND_MAX_CHIPS]; ++ unsigned int nchips; + }; + + static uint8_t oxnas_nand_read_byte(struct nand_chip *chip) +@@ -79,7 +80,6 @@ static int oxnas_nand_probe(struct platf + struct nand_chip *chip; + struct mtd_info *mtd; + struct resource *res; +- int nchips = 0; + int count = 0; + int err = 0; + +@@ -143,12 +143,12 @@ static int oxnas_nand_probe(struct platf + if (err) + goto err_cleanup_nand; + +- oxnas->chips[nchips] = chip; +- ++nchips; ++ oxnas->chips[oxnas->nchips] = chip; ++ ++oxnas->nchips; + } + + /* Exit if no chips found */ +- if (!nchips) { ++ if (!oxnas->nchips) { + err = -ENODEV; + goto err_clk_unprepare; + } diff --git a/queue-5.4/mtd-rawnand-oxnas-release-all-devices-in-the-_remove-path.patch b/queue-5.4/mtd-rawnand-oxnas-release-all-devices-in-the-_remove-path.patch new file mode 100644 index 00000000000..0d3dd113ac1 --- /dev/null +++ b/queue-5.4/mtd-rawnand-oxnas-release-all-devices-in-the-_remove-path.patch @@ -0,0 +1,39 @@ +From 0a5f45e57e35d0840bedb816974ce2e63406cd8b Mon Sep 17 00:00:00 2001 +From: Miquel Raynal +Date: Tue, 19 May 2020 15:00:11 +0200 +Subject: mtd: rawnand: oxnas: Release all devices in the _remove() path + +From: Miquel Raynal + +commit 0a5f45e57e35d0840bedb816974ce2e63406cd8b upstream. + +oxnans_nand_remove() should release all MTD devices and clean all NAND +devices, not only the first one registered. + +Fixes: 668592492409 ("mtd: nand: Add OX820 NAND Support") +Signed-off-by: Miquel Raynal +Link: https://lore.kernel.org/linux-mtd/20200519130035.1883-39-miquel.raynal@bootlin.com +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/mtd/nand/raw/oxnas_nand.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +--- a/drivers/mtd/nand/raw/oxnas_nand.c ++++ b/drivers/mtd/nand/raw/oxnas_nand.c +@@ -177,9 +177,13 @@ err_clk_unprepare: + static int oxnas_nand_remove(struct platform_device *pdev) + { + struct oxnas_nand_ctrl *oxnas = platform_get_drvdata(pdev); ++ struct nand_chip *chip; ++ int i; + +- if (oxnas->chips[0]) +- nand_release(oxnas->chips[0]); ++ for (i = 0; i < oxnas->nchips; i++) { ++ chip = oxnas->chips[i]; ++ nand_release(chip); ++ } + + clk_disable_unprepare(oxnas->clk); + diff --git a/queue-5.4/mtd-rawnand-oxnas-unregister-all-devices-on-error.patch b/queue-5.4/mtd-rawnand-oxnas-unregister-all-devices-on-error.patch new file mode 100644 index 00000000000..ea005e2ac21 --- /dev/null +++ b/queue-5.4/mtd-rawnand-oxnas-unregister-all-devices-on-error.patch @@ -0,0 +1,48 @@ +From b60391eb17b2956ff2fc4c348e5a464da21ff9cb Mon Sep 17 00:00:00 2001 +From: Miquel Raynal +Date: Tue, 19 May 2020 15:00:10 +0200 +Subject: mtd: rawnand: oxnas: Unregister all devices on error + +From: Miquel Raynal + +commit b60391eb17b2956ff2fc4c348e5a464da21ff9cb upstream. + +On error, the oxnas probe path just frees the device which failed and +aborts the probe, leaving unreleased resources. + +Fix this situation by calling mtd_device_unregister()/nand_cleanup() +on these. + +Fixes: 668592492409 ("mtd: nand: Add OX820 NAND Support") +Signed-off-by: Miquel Raynal +Link: https://lore.kernel.org/linux-mtd/20200519130035.1883-38-miquel.raynal@bootlin.com +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/mtd/nand/raw/oxnas_nand.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/mtd/nand/raw/oxnas_nand.c ++++ b/drivers/mtd/nand/raw/oxnas_nand.c +@@ -82,6 +82,7 @@ static int oxnas_nand_probe(struct platf + struct resource *res; + int count = 0; + int err = 0; ++ int i; + + /* Allocate memory for the device structure (and zero it) */ + oxnas = devm_kzalloc(&pdev->dev, sizeof(*oxnas), +@@ -161,6 +162,13 @@ err_cleanup_nand: + nand_cleanup(chip); + err_release_child: + of_node_put(nand_np); ++ ++ for (i = 0; i < oxnas->nchips; i++) { ++ chip = oxnas->chips[i]; ++ WARN_ON(mtd_device_unregister(nand_to_mtd(chip))); ++ nand_cleanup(chip); ++ } ++ + err_clk_unprepare: + clk_disable_unprepare(oxnas->clk); + return err; diff --git a/queue-5.4/mtd-rawnand-timings-fix-default-tr_max-and-tccs_min-timings.patch b/queue-5.4/mtd-rawnand-timings-fix-default-tr_max-and-tccs_min-timings.patch new file mode 100644 index 00000000000..c5a5e5dfa06 --- /dev/null +++ b/queue-5.4/mtd-rawnand-timings-fix-default-tr_max-and-tccs_min-timings.patch @@ -0,0 +1,38 @@ +From 4d8ec041d9c454029f6cd90622f6d81eb61e781c Mon Sep 17 00:00:00 2001 +From: Miquel Raynal +Date: Tue, 28 Apr 2020 11:42:55 +0200 +Subject: mtd: rawnand: timings: Fix default tR_max and tCCS_min timings + +From: Miquel Raynal + +commit 4d8ec041d9c454029f6cd90622f6d81eb61e781c upstream. + +tR and tCCS are currently wrongly expressed in femtoseconds, while we +expect these values to be expressed in picoseconds. Set right +hardcoded values. + +Fixes: 6a943386ee36 mtd: rawnand: add default values for dynamic timings +Signed-off-by: Miquel Raynal +Reviewed-by: Boris Brezillon +Link: https://lore.kernel.org/linux-mtd/20200428094302.14624-3-miquel.raynal@bootlin.com +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/mtd/nand/raw/nand_timings.c | 5 ++--- + 1 file changed, 2 insertions(+), 3 deletions(-) + +--- a/drivers/mtd/nand/raw/nand_timings.c ++++ b/drivers/mtd/nand/raw/nand_timings.c +@@ -314,10 +314,9 @@ int onfi_fill_data_interface(struct nand + /* microseconds -> picoseconds */ + timings->tPROG_max = 1000000ULL * ONFI_DYN_TIMING_MAX; + timings->tBERS_max = 1000000ULL * ONFI_DYN_TIMING_MAX; +- timings->tR_max = 1000000ULL * 200000000ULL; + +- /* nanoseconds -> picoseconds */ +- timings->tCCS_min = 1000UL * 500000; ++ timings->tR_max = 200000000; ++ timings->tCCS_min = 500000; + } + + return 0; diff --git a/queue-5.4/samples-fix-binderfs-sample.patch b/queue-5.4/samples-fix-binderfs-sample.patch deleted file mode 100644 index 060f3976b4c..00000000000 --- a/queue-5.4/samples-fix-binderfs-sample.patch +++ /dev/null @@ -1,50 +0,0 @@ -From c624adc9cb6e6e8f1c0230a7775add700bc2409b Mon Sep 17 00:00:00 2001 -From: Arnd Bergmann -Date: Tue, 28 Apr 2020 23:25:33 +0200 -Subject: samples: fix binderfs sample - -From: Arnd Bergmann - -commit c624adc9cb6e6e8f1c0230a7775add700bc2409b upstream. - -A routine check for misspelled Kconfig symbols showed on instance -from last year, the correct symbol name is CONFIG_ANDROID_BINDERFS, -not CONFIG_CONFIG_ANDROID_BINDERFS, so the extra prefix must -be removed in the Kconfig file to allow enabling the sample. - -As the actual sample fails to build as a kernel module, change the -Makefile enough to get to build as a hostprog instead. - -Fixes: 9762dc1432e1 ("samples: add binderfs sample program") -Signed-off-by: Arnd Bergmann -Acked-by: Christian Brauner -Link: https://lore.kernel.org/r/20200428212555.2806258-1-arnd@arndb.de -Signed-off-by: Jonathan Corbet -Signed-off-by: Greg Kroah-Hartman - ---- - samples/Kconfig | 2 +- - samples/binderfs/Makefile | 6 +++++- - 2 files changed, 6 insertions(+), 2 deletions(-) - ---- a/samples/Kconfig -+++ b/samples/Kconfig -@@ -156,7 +156,7 @@ config SAMPLE_VFIO_MDEV_MBOCHS - - config SAMPLE_ANDROID_BINDERFS - bool "Build Android binderfs example" -- depends on CONFIG_ANDROID_BINDERFS -+ depends on ANDROID_BINDERFS - help - Builds a sample program to illustrate the use of the Android binderfs - filesystem. ---- a/samples/binderfs/Makefile -+++ b/samples/binderfs/Makefile -@@ -1,2 +1,6 @@ - # SPDX-License-Identifier: GPL-2.0-only --obj-$(CONFIG_SAMPLE_ANDROID_BINDERFS) += binderfs_example.o -+ifndef CROSS_COMPILE -+ifdef CONFIG_SAMPLE_ANDROID_BINDERFS -+hostprogs := binderfs_example -+endif -+endif diff --git a/queue-5.4/series b/queue-5.4/series index e365c88d4bb..6930408b447 100644 --- a/queue-5.4/series +++ b/queue-5.4/series @@ -128,5 +128,17 @@ soc-qcom-rpmh-update-dirty-flag-only-when-data-changes.patch soc-qcom-rpmh-invalidate-sleep-and-wake-tcses-before-flushing-new-data.patch soc-qcom-rpmh-rsc-clear-active-mode-configuration-for-wake-tcs.patch soc-qcom-rpmh-rsc-allow-using-free-wake-tcs-for-active-request.patch -samples-fix-binderfs-sample.patch rdma-mlx5-verify-that-qp-is-created-with-rq-or-sq.patch +mtd-rawnand-marvell-fix-the-condition-on-a-return-code.patch +mtd-rawnand-marvell-use-nand_cleanup-when-the-device-is-not-yet-registered.patch +mtd-rawnand-marvell-fix-probe-error-path.patch +mtd-rawnand-timings-fix-default-tr_max-and-tccs_min-timings.patch +mtd-rawnand-brcmnand-correctly-verify-erased-pages.patch +mtd-rawnand-brcmnand-fix-cs0-layout.patch +mtd-rawnand-oxnas-keep-track-of-registered-devices.patch +mtd-rawnand-oxnas-unregister-all-devices-on-error.patch +mtd-rawnand-oxnas-release-all-devices-in-the-_remove-path.patch +clk-qcom-gcc-add-gpu-and-npu-clocks-for-sm8150.patch +clk-qcom-gcc-add-missing-ufs-clocks-for-sm8150.patch +slimbus-core-fix-mismatch-in-of_node_get-put.patch +hid-logitech-hidpp-avoid-repeated-multiplier-log-messages.patch diff --git a/queue-5.4/slimbus-core-fix-mismatch-in-of_node_get-put.patch b/queue-5.4/slimbus-core-fix-mismatch-in-of_node_get-put.patch new file mode 100644 index 00000000000..0ccfd52b552 --- /dev/null +++ b/queue-5.4/slimbus-core-fix-mismatch-in-of_node_get-put.patch @@ -0,0 +1,32 @@ +From 01360857486c0e4435dea3aa2f78b47213b7cf6a Mon Sep 17 00:00:00 2001 +From: Saravana Kannan +Date: Mon, 11 May 2020 16:13:34 +0100 +Subject: slimbus: core: Fix mismatch in of_node_get/put + +From: Saravana Kannan + +commit 01360857486c0e4435dea3aa2f78b47213b7cf6a upstream. + +Adding missing corresponding of_node_put + +Fixes: 7588a511bdb4 ("slimbus: core: add support to device tree helper") +Signed-off-by: Saravana Kannan +[Srini: added fixes tag, removed NULL check and updated log] +Signed-off-by: Srinivas Kandagatla +Link: https://lore.kernel.org/r/20200511151334.362-3-srinivas.kandagatla@linaro.org +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/slimbus/core.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/slimbus/core.c ++++ b/drivers/slimbus/core.c +@@ -283,6 +283,7 @@ EXPORT_SYMBOL_GPL(slim_register_controll + /* slim_remove_device: Remove the effect of slim_add_device() */ + static void slim_remove_device(struct slim_device *sbdev) + { ++ of_node_put(sbdev->dev.of_node); + device_unregister(&sbdev->dev); + } +