From: Hal Feng <hal.feng@starfivetech.com>
Date: Tue, 4 Jun 2024 08:47:27 +0000 (+0800)
Subject: dt-bindings: serial: snps-dw-apb-uart: Add one more reset signal for StarFive JH7110 SoC
X-Git-Tag: v6.11-rc1~103^2~17
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=ac434f2877b97e18c3df7d9b1e8e2371befd9890;p=thirdparty%2Fkernel%2Flinux.git

dt-bindings: serial: snps-dw-apb-uart: Add one more reset signal for StarFive JH7110 SoC

The UART of StarFive JH7110 has two reset signals.
Both of them are necessary for JH7110 to initialize UART.

Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240604084729.57239-2-hal.feng@starfivetech.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---

diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
index 1001d2a6ace85..4cdb0dcaccf38 100644
--- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
+++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
@@ -13,6 +13,20 @@ allOf:
   - $ref: serial.yaml#
   - $ref: rs485.yaml#
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: starfive,jh7110-uart
+    then:
+      properties:
+        resets:
+          minItems: 2
+    else:
+      properties:
+        resets:
+          maxItems: 1
+
 properties:
   compatible:
     oneOf:
@@ -48,6 +62,7 @@ properties:
           - enum:
               - starfive,jh7100-hsuart
               - starfive,jh7100-uart
+              - starfive,jh7110-uart
           - const: snps,dw-apb-uart
       - const: snps,dw-apb-uart
 
@@ -82,7 +97,8 @@ properties:
     type: boolean
 
   resets:
-    maxItems: 1
+    minItems: 1
+    maxItems: 2
 
   reg-shift: true