From: Linus Walleij <linus.walleij@linaro.org>
Date: Tue, 13 Sep 2022 13:28:44 +0000 (+0200)
Subject: ARM: dts: qcom: msm8660: Add GSBI1 SPI bus
X-Git-Tag: v6.1-rc1~154^2~10^2~19
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=affa747d36aa81b2285fe0221e2624b0afaa3482;p=thirdparty%2Flinux.git

ARM: dts: qcom: msm8660: Add GSBI1 SPI bus

GSBI1 can be used to enable an external SPI bus on e.g. the
APQ8060. On the DragonBoard APQ8060 this SPI bus is used to
talk to the LCD display.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
[bjorn: Moved status properties last]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220913132846.305716-1-linus.walleij@linaro.org
---

diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
index 63a501c63cf8e..65f71cf2d5d79 100644
--- a/arch/arm/boot/dts/qcom-msm8660.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
@@ -131,6 +131,32 @@
 			reg = <0x900000 0x4000>;
 		};
 
+		gsbi1: gsbi@16000000 {
+			compatible = "qcom,gsbi-v1.0.0";
+			cell-index = <12>;
+			reg = <0x16000000 0x100>;
+			clocks = <&gcc GSBI1_H_CLK>;
+			clock-names = "iface";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			syscon-tcsr = <&tcsr>;
+
+			status = "disabled";
+
+			gsbi1_spi: spi@16080000 {
+				compatible = "qcom,spi-qup-v1.1.1";
+				reg = <0x16080000 0x1000>;
+				interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
+				clock-names = "core", "iface";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+		};
+
 		gsbi6: gsbi@16500000 {
 			compatible = "qcom,gsbi-v1.0.0";
 			cell-index = <12>;