From: Greg Kroah-Hartman Date: Wed, 26 Sep 2012 23:33:20 +0000 (-0700) Subject: 3.5-stable patches X-Git-Tag: v3.0.44~54 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=b059b7e8e9d3def8e3688faa7aac9bc57da89b3b;p=thirdparty%2Fkernel%2Fstable-queue.git 3.5-stable patches added patches: asus-laptop-hrws-hwrs-typo.patch asus-nb-wmi-add-some-video-toggle-keys.patch drm-add-edid_quirk_force_reduced_blanking-for-asus-vw222s.patch drm-check-for-invalid-cursor-flags.patch drm-i915-fix-wrong-order-of-parameters-in-port-checking.patch drm-nvc0-copy-check-punits-to-determine-which-copy-engines-are-disabled.patch drm-radeon-atom-powergating-fixes-for-dce6.patch drm-radeon-atom-rework-dig-modesetting-on-dce3.patch drm-radeon-convert-radeon-vfct-code-to-use-acpi_get_table_with_size.patch --- diff --git a/queue-3.5/asus-laptop-hrws-hwrs-typo.patch b/queue-3.5/asus-laptop-hrws-hwrs-typo.patch new file mode 100644 index 00000000000..08e526120ef --- /dev/null +++ b/queue-3.5/asus-laptop-hrws-hwrs-typo.patch @@ -0,0 +1,44 @@ +From 8871e99f89b7d7b1ea99de550eea2a56273f42ab Mon Sep 17 00:00:00 2001 +From: Corentin Chary +Date: Mon, 20 Aug 2012 23:01:51 +0200 +Subject: asus-laptop: HRWS/HWRS typo + +From: Corentin Chary + +commit 8871e99f89b7d7b1ea99de550eea2a56273f42ab upstream. + +Resolves-bug: https://bugzilla.kernel.org/show_bug.cgi?id=24222 +Signed-off-by: Corentin Chary +Signed-off-by: Matthew Garrett +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/platform/x86/asus-laptop.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/platform/x86/asus-laptop.c ++++ b/drivers/platform/x86/asus-laptop.c +@@ -863,9 +863,9 @@ static ssize_t show_infos(struct device + * The significance of others is yet to be found. + * If we don't find the method, we assume the device are present. + */ +- rv = acpi_evaluate_integer(asus->handle, "HRWS", NULL, &temp); ++ rv = acpi_evaluate_integer(asus->handle, "HWRS", NULL, &temp); + if (!ACPI_FAILURE(rv)) +- len += sprintf(page + len, "HRWS value : %#x\n", ++ len += sprintf(page + len, "HWRS value : %#x\n", + (uint) temp); + /* + * Another value for userspace: the ASYM method returns 0x02 for +@@ -1751,9 +1751,9 @@ static int asus_laptop_get_info(struct a + * The significance of others is yet to be found. + */ + status = +- acpi_evaluate_integer(asus->handle, "HRWS", NULL, &hwrs_result); ++ acpi_evaluate_integer(asus->handle, "HWRS", NULL, &hwrs_result); + if (!ACPI_FAILURE(status)) +- pr_notice(" HRWS returned %x", (int)hwrs_result); ++ pr_notice(" HWRS returned %x", (int)hwrs_result); + + if (!acpi_check_handle(asus->handle, METHOD_WL_STATUS, NULL)) + asus->have_rsts = true; diff --git a/queue-3.5/asus-nb-wmi-add-some-video-toggle-keys.patch b/queue-3.5/asus-nb-wmi-add-some-video-toggle-keys.patch new file mode 100644 index 00000000000..b92a9d4667a --- /dev/null +++ b/queue-3.5/asus-nb-wmi-add-some-video-toggle-keys.patch @@ -0,0 +1,39 @@ +From 3766054fff4af1b58a1440a284907887f4d2e8be Mon Sep 17 00:00:00 2001 +From: AceLan Kao +Date: Wed, 4 Jul 2012 15:20:14 +0800 +Subject: asus-nb-wmi: add some video toggle keys + +From: AceLan Kao + +commit 3766054fff4af1b58a1440a284907887f4d2e8be upstream. + +There are some new video switch keys that used by newer machines. +0xA0 - SDSP HDMI only +0xA1 - SDSP LCD + HDMI +0xA2 - SDSP CRT + HDMI +0xA3 - SDSP TV + HDMI +But in Linux, there is no suitable userspace application to handle this, +so, mapping them all to KEY_SWITCHVIDEOMODE. + +Signed-off-by: AceLan Kao +Signed-off-by: Matthew Garrett +Cc: Tim Gardner +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/platform/x86/asus-nb-wmi.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/platform/x86/asus-nb-wmi.c ++++ b/drivers/platform/x86/asus-nb-wmi.c +@@ -94,6 +94,10 @@ static const struct key_entry asus_nb_wm + { KE_KEY, 0x8A, { KEY_PROG1 } }, + { KE_KEY, 0x95, { KEY_MEDIA } }, + { KE_KEY, 0x99, { KEY_PHONE } }, ++ { KE_KEY, 0xA0, { KEY_SWITCHVIDEOMODE } }, /* SDSP HDMI only */ ++ { KE_KEY, 0xA1, { KEY_SWITCHVIDEOMODE } }, /* SDSP LCD + HDMI */ ++ { KE_KEY, 0xA2, { KEY_SWITCHVIDEOMODE } }, /* SDSP CRT + HDMI */ ++ { KE_KEY, 0xA3, { KEY_SWITCHVIDEOMODE } }, /* SDSP TV + HDMI */ + { KE_KEY, 0xb5, { KEY_CALC } }, + { KE_KEY, 0xc4, { KEY_KBDILLUMUP } }, + { KE_KEY, 0xc5, { KEY_KBDILLUMDOWN } }, diff --git a/queue-3.5/drm-add-edid_quirk_force_reduced_blanking-for-asus-vw222s.patch b/queue-3.5/drm-add-edid_quirk_force_reduced_blanking-for-asus-vw222s.patch new file mode 100644 index 00000000000..86f9cb91d91 --- /dev/null +++ b/queue-3.5/drm-add-edid_quirk_force_reduced_blanking-for-asus-vw222s.patch @@ -0,0 +1,55 @@ +From 6f33814bd4d9cfe76033a31b1c0c76c960cd8e4b Mon Sep 17 00:00:00 2001 +From: Paul Menzel +Date: Wed, 8 Aug 2012 23:12:19 +0200 +Subject: drm: Add EDID_QUIRK_FORCE_REDUCED_BLANKING for ASUS VW222S + +From: Paul Menzel + +commit 6f33814bd4d9cfe76033a31b1c0c76c960cd8e4b upstream. + +Connecting an ASUS VW222S [1] over VGA a garbled screen is shown with +vertical stripes in the top half. + +In commit bc42aabc [2] + + commit bc42aabc6a01b92b0f961d65671564e0e1cd7592 + Author: Adam Jackson + Date: Wed May 23 16:26:54 2012 -0400 + + drm/edid/quirks: ViewSonic VA2026w + +Adam Jackson added the quirk `EDID_QUIRK_FORCE_REDUCED_BLANKING` which +is also needed for this ASUS monitor. + +All log files and output from `xrandr` is included in the referenced +Bugzilla report #17629. + +Please note that this monitor only has a VGA (D-Sub) connector [1]. + +[1] http://www.asus.com/Display/LCD_Monitors/VW222S/ +[2] http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=commit;h=bc42aabc6a01b92b0f961d65671564e0e1cd7592 + +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=17629 +Signed-off-by: Paul Menzel +Cc: +Cc: Adam Jackson +Cc: Ian Pilcher +Signed-off-by: Dave Airlie +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/drm_edid.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/gpu/drm/drm_edid.c ++++ b/drivers/gpu/drm/drm_edid.c +@@ -87,6 +87,9 @@ static struct edid_quirk { + int product_id; + u32 quirks; + } edid_quirk_list[] = { ++ /* ASUS VW222S */ ++ { "ACI", 0x22a2, EDID_QUIRK_FORCE_REDUCED_BLANKING }, ++ + /* Acer AL1706 */ + { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, + /* Acer F51 */ diff --git a/queue-3.5/drm-check-for-invalid-cursor-flags.patch b/queue-3.5/drm-check-for-invalid-cursor-flags.patch new file mode 100644 index 00000000000..8d4c37f12de --- /dev/null +++ b/queue-3.5/drm-check-for-invalid-cursor-flags.patch @@ -0,0 +1,43 @@ +From 7c4eaca4162d0b5ad4fb39f974d7ffd71b9daa09 Mon Sep 17 00:00:00 2001 +From: Jakob Bornecrantz +Date: Thu, 16 Aug 2012 08:29:03 +0000 +Subject: drm: Check for invalid cursor flags + +From: Jakob Bornecrantz + +commit 7c4eaca4162d0b5ad4fb39f974d7ffd71b9daa09 upstream. + +Signed-off-by: Jakob Bornecrantz +Signed-off-by: Dave Airlie +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/drm_crtc.c | 2 +- + include/drm/drm_mode.h | 5 +++-- + 2 files changed, 4 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/drm_crtc.c ++++ b/drivers/gpu/drm/drm_crtc.c +@@ -1981,7 +1981,7 @@ int drm_mode_cursor_ioctl(struct drm_dev + if (!drm_core_check_feature(dev, DRIVER_MODESET)) + return -EINVAL; + +- if (!req->flags) ++ if (!req->flags || (~DRM_MODE_CURSOR_FLAGS & req->flags)) + return -EINVAL; + + mutex_lock(&dev->mode_config.mutex); +--- a/include/drm/drm_mode.h ++++ b/include/drm/drm_mode.h +@@ -359,8 +359,9 @@ struct drm_mode_mode_cmd { + struct drm_mode_modeinfo mode; + }; + +-#define DRM_MODE_CURSOR_BO (1<<0) +-#define DRM_MODE_CURSOR_MOVE (1<<1) ++#define DRM_MODE_CURSOR_BO 0x01 ++#define DRM_MODE_CURSOR_MOVE 0x02 ++#define DRM_MODE_CURSOR_FLAGS 0x03 + + /* + * depending on the value in flags different members are used. diff --git a/queue-3.5/drm-i915-fix-wrong-order-of-parameters-in-port-checking.patch b/queue-3.5/drm-i915-fix-wrong-order-of-parameters-in-port-checking.patch new file mode 100644 index 00000000000..30281a68e0d --- /dev/null +++ b/queue-3.5/drm-i915-fix-wrong-order-of-parameters-in-port-checking.patch @@ -0,0 +1,85 @@ +From b70ad586162609141f0aa9eb34790f31a8954f89 Mon Sep 17 00:00:00 2001 +From: "Xu, Anhua" +Date: Mon, 13 Aug 2012 03:08:33 +0000 +Subject: drm/i915: fix wrong order of parameters in port checking + functions + +From: "Xu, Anhua" + +commit b70ad586162609141f0aa9eb34790f31a8954f89 upstream. + +Wrong order of parameters passed-in when calling hdmi/adpa +/lvds_pipe_enabled(), 2nd and 3rd parameters are reversed. + +This bug was indroduced by + +commit 1519b9956eb4b4180fa3f47c73341463cdcfaa37 +Author: Keith Packard +Date: Sat Aug 6 10:35:34 2011 -0700 + + drm/i915: Fix PCH port pipe select in CPT disable paths + +The reachable tag for this commit is v3.1-rc1-3-g1519b99 + +Signed-off-by: Anhua Xu +Reviewed-by: Chris Wilson +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44876 +Tested-by: Daniel Schroeder +Signed-off-by: Daniel Vetter +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_display.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -1238,7 +1238,7 @@ static void assert_pch_hdmi_disabled(str + enum pipe pipe, int reg) + { + u32 val = I915_READ(reg); +- WARN(hdmi_pipe_enabled(dev_priv, val, pipe), ++ WARN(hdmi_pipe_enabled(dev_priv, pipe, val), + "PCH HDMI (0x%08x) enabled on transcoder %c, should be disabled\n", + reg, pipe_name(pipe)); + } +@@ -1255,13 +1255,13 @@ static void assert_pch_ports_disabled(st + + reg = PCH_ADPA; + val = I915_READ(reg); +- WARN(adpa_pipe_enabled(dev_priv, val, pipe), ++ WARN(adpa_pipe_enabled(dev_priv, pipe, val), + "PCH VGA enabled on transcoder %c, should be disabled\n", + pipe_name(pipe)); + + reg = PCH_LVDS; + val = I915_READ(reg); +- WARN(lvds_pipe_enabled(dev_priv, val, pipe), ++ WARN(lvds_pipe_enabled(dev_priv, pipe, val), + "PCH LVDS enabled on transcoder %c, should be disabled\n", + pipe_name(pipe)); + +@@ -1723,7 +1723,7 @@ static void disable_pch_hdmi(struct drm_ + enum pipe pipe, int reg) + { + u32 val = I915_READ(reg); +- if (hdmi_pipe_enabled(dev_priv, val, pipe)) { ++ if (hdmi_pipe_enabled(dev_priv, pipe, val)) { + DRM_DEBUG_KMS("Disabling pch HDMI %x on pipe %d\n", + reg, pipe); + I915_WRITE(reg, val & ~PORT_ENABLE); +@@ -1745,12 +1745,12 @@ static void intel_disable_pch_ports(stru + + reg = PCH_ADPA; + val = I915_READ(reg); +- if (adpa_pipe_enabled(dev_priv, val, pipe)) ++ if (adpa_pipe_enabled(dev_priv, pipe, val)) + I915_WRITE(reg, val & ~ADPA_DAC_ENABLE); + + reg = PCH_LVDS; + val = I915_READ(reg); +- if (lvds_pipe_enabled(dev_priv, val, pipe)) { ++ if (lvds_pipe_enabled(dev_priv, pipe, val)) { + DRM_DEBUG_KMS("disable lvds on pipe %d val 0x%08x\n", pipe, val); + I915_WRITE(reg, val & ~LVDS_PORT_EN); + POSTING_READ(reg); diff --git a/queue-3.5/drm-nvc0-copy-check-punits-to-determine-which-copy-engines-are-disabled.patch b/queue-3.5/drm-nvc0-copy-check-punits-to-determine-which-copy-engines-are-disabled.patch new file mode 100644 index 00000000000..171e1db0f4b --- /dev/null +++ b/queue-3.5/drm-nvc0-copy-check-punits-to-determine-which-copy-engines-are-disabled.patch @@ -0,0 +1,39 @@ +From 14f0458a41e033dee31ba605137419385c03fc78 Mon Sep 17 00:00:00 2001 +From: Ben Skeggs +Date: Mon, 27 Aug 2012 16:22:49 +1000 +Subject: drm/nvc0/copy: check PUNITS to determine which copy engines are disabled + +From: Ben Skeggs + +commit 14f0458a41e033dee31ba605137419385c03fc78 upstream. + +On some Fermi chipsets (NVCE particularly) PCOPY1 doesn't exist. And if +what I've seen on Kepler is true of Fermi too, chipsets of the same type +can have different PCOPY units available. + +This should fix a v3.5 regression reported by a number of people effecting +suspend/resume on NVC8/NVCE chipsets. + +Signed-off-by: Ben Skeggs +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/nouveau/nouveau_state.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/nouveau/nouveau_state.c ++++ b/drivers/gpu/drm/nouveau/nouveau_state.c +@@ -737,9 +737,11 @@ nouveau_card_init(struct drm_device *dev + } + break; + case NV_C0: +- nvc0_copy_create(dev, 1); ++ if (!(nv_rd32(dev, 0x022500) & 0x00000200)) ++ nvc0_copy_create(dev, 1); + case NV_D0: +- nvc0_copy_create(dev, 0); ++ if (!(nv_rd32(dev, 0x022500) & 0x00000100)) ++ nvc0_copy_create(dev, 0); + break; + default: + break; diff --git a/queue-3.5/drm-radeon-atom-powergating-fixes-for-dce6.patch b/queue-3.5/drm-radeon-atom-powergating-fixes-for-dce6.patch new file mode 100644 index 00000000000..0b9b265230c --- /dev/null +++ b/queue-3.5/drm-radeon-atom-powergating-fixes-for-dce6.patch @@ -0,0 +1,62 @@ +From c205b232a64fed6d26edd7e40985b396de99a27f Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Fri, 24 Aug 2012 18:21:21 -0400 +Subject: drm/radeon/atom: powergating fixes for DCE6 + +From: Alex Deucher + +commit c205b232a64fed6d26edd7e40985b396de99a27f upstream. + +Power gating is per crtc pair, but the powergating registers +should be called individually. The hw handles power up/down +properly. The pair is powered up if either crtc in the pair +is powered up and the pair is not powered down until both +crtcs in the pair are powered down. This simplifies +programming and should save additional power as the previous +code never actually power gated the crtc pair. + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/atombios_crtc.c | 22 ++-------------------- + 1 file changed, 2 insertions(+), 20 deletions(-) + +--- a/drivers/gpu/drm/radeon/atombios_crtc.c ++++ b/drivers/gpu/drm/radeon/atombios_crtc.c +@@ -258,7 +258,6 @@ void atombios_crtc_dpms(struct drm_crtc + radeon_crtc->enabled = true; + /* adjust pm to dpms changes BEFORE enabling crtcs */ + radeon_pm_compute_clocks(rdev); +- /* disable crtc pair power gating before programming */ + if (ASIC_IS_DCE6(rdev) && !radeon_crtc->in_mode_set) + atombios_powergate_crtc(crtc, ATOM_DISABLE); + atombios_enable_crtc(crtc, ATOM_ENABLE); +@@ -278,25 +277,8 @@ void atombios_crtc_dpms(struct drm_crtc + atombios_enable_crtc_memreq(crtc, ATOM_DISABLE); + atombios_enable_crtc(crtc, ATOM_DISABLE); + radeon_crtc->enabled = false; +- /* power gating is per-pair */ +- if (ASIC_IS_DCE6(rdev) && !radeon_crtc->in_mode_set) { +- struct drm_crtc *other_crtc; +- struct radeon_crtc *other_radeon_crtc; +- list_for_each_entry(other_crtc, &rdev->ddev->mode_config.crtc_list, head) { +- other_radeon_crtc = to_radeon_crtc(other_crtc); +- if (((radeon_crtc->crtc_id == 0) && (other_radeon_crtc->crtc_id == 1)) || +- ((radeon_crtc->crtc_id == 1) && (other_radeon_crtc->crtc_id == 0)) || +- ((radeon_crtc->crtc_id == 2) && (other_radeon_crtc->crtc_id == 3)) || +- ((radeon_crtc->crtc_id == 3) && (other_radeon_crtc->crtc_id == 2)) || +- ((radeon_crtc->crtc_id == 4) && (other_radeon_crtc->crtc_id == 5)) || +- ((radeon_crtc->crtc_id == 5) && (other_radeon_crtc->crtc_id == 4))) { +- /* if both crtcs in the pair are off, enable power gating */ +- if (other_radeon_crtc->enabled == false) +- atombios_powergate_crtc(crtc, ATOM_ENABLE); +- break; +- } +- } +- } ++ if (ASIC_IS_DCE6(rdev) && !radeon_crtc->in_mode_set) ++ atombios_powergate_crtc(crtc, ATOM_ENABLE); + /* adjust pm to dpms changes AFTER disabling crtcs */ + radeon_pm_compute_clocks(rdev); + break; diff --git a/queue-3.5/drm-radeon-atom-rework-dig-modesetting-on-dce3.patch b/queue-3.5/drm-radeon-atom-rework-dig-modesetting-on-dce3.patch new file mode 100644 index 00000000000..c6c30e4bbcd --- /dev/null +++ b/queue-3.5/drm-radeon-atom-rework-dig-modesetting-on-dce3.patch @@ -0,0 +1,207 @@ +From 8d1af57ae3c4458ed0de93ef97f388dd1b3239c7 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Wed, 22 Aug 2012 09:54:56 -0400 +Subject: drm/radeon/atom: rework DIG modesetting on DCE3+ + +From: Alex Deucher + +commit 8d1af57ae3c4458ed0de93ef97f388dd1b3239c7 upstream. + +The ordering is important and the current drm code +wasn't cutting it for modern DIG encoders. We need +to have information about crtc before setting up +the encoders so I've shifted the ordering a bit. +Probably we'll need a full rework akin to danvet's +recent intel patchs. This patch fixes numerous +issues with DP bridge chips and makes link training +much more reliable. + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/atombios_encoders.c | 109 ++++++++++++----------------- + 1 file changed, 47 insertions(+), 62 deletions(-) + +--- a/drivers/gpu/drm/radeon/atombios_encoders.c ++++ b/drivers/gpu/drm/radeon/atombios_encoders.c +@@ -1379,6 +1379,8 @@ radeon_atom_encoder_dpms_dig(struct drm_ + struct drm_device *dev = encoder->dev; + struct radeon_device *rdev = dev->dev_private; + struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); ++ struct drm_encoder *ext_encoder = radeon_get_external_encoder(encoder); ++ struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; + struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); + struct radeon_connector *radeon_connector = NULL; + struct radeon_connector_atom_dig *radeon_dig_connector = NULL; +@@ -1390,19 +1392,37 @@ radeon_atom_encoder_dpms_dig(struct drm_ + + switch (mode) { + case DRM_MODE_DPMS_ON: +- /* some early dce3.2 boards have a bug in their transmitter control table */ +- if ((rdev->family == CHIP_RV710) || (rdev->family == CHIP_RV730) || +- ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) { +- if (ASIC_IS_DCE6(rdev)) { +- /* It seems we need to call ATOM_ENCODER_CMD_SETUP again +- * before reenabling encoder on DPMS ON, otherwise we never +- * get picture +- */ +- atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_SETUP, 0); ++ if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) { ++ if (!connector) ++ dig->panel_mode = DP_PANEL_MODE_EXTERNAL_DP_MODE; ++ else ++ dig->panel_mode = radeon_dp_get_panel_mode(encoder, connector); ++ ++ /* setup and enable the encoder */ ++ atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_SETUP, 0); ++ atombios_dig_encoder_setup(encoder, ++ ATOM_ENCODER_CMD_SETUP_PANEL_MODE, ++ dig->panel_mode); ++ if (ext_encoder) { ++ if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE61(rdev)) ++ atombios_external_encoder_setup(encoder, ext_encoder, ++ EXTERNAL_ENCODER_ACTION_V3_ENCODER_SETUP); + } + atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0); +- } else { ++ } else if (ASIC_IS_DCE4(rdev)) { ++ /* setup and enable the encoder */ ++ atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_SETUP, 0); ++ /* enable the transmitter */ ++ atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0); + atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0); ++ } else { ++ /* setup and enable the encoder and transmitter */ ++ atombios_dig_encoder_setup(encoder, ATOM_ENABLE, 0); ++ atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0); ++ atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0); ++ /* some early dce3.2 boards have a bug in their transmitter control table */ ++ if ((rdev->family != CHIP_RV710) || (rdev->family != CHIP_RV730)) ++ atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0); + } + if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) { + if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { +@@ -1420,10 +1440,19 @@ radeon_atom_encoder_dpms_dig(struct drm_ + case DRM_MODE_DPMS_STANDBY: + case DRM_MODE_DPMS_SUSPEND: + case DRM_MODE_DPMS_OFF: +- if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) ++ if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) { ++ /* disable the transmitter */ + atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0); +- else ++ } else if (ASIC_IS_DCE4(rdev)) { ++ /* disable the transmitter */ ++ atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE_OUTPUT, 0, 0); ++ atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0); ++ } else { ++ /* disable the encoder and transmitter */ + atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE_OUTPUT, 0, 0); ++ atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0); ++ atombios_dig_encoder_setup(encoder, ATOM_DISABLE, 0); ++ } + if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) { + if (ASIC_IS_DCE4(rdev)) + atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0); +@@ -1848,10 +1877,12 @@ radeon_atom_encoder_mode_set(struct drm_ + struct drm_device *dev = encoder->dev; + struct radeon_device *rdev = dev->dev_private; + struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); +- struct drm_encoder *ext_encoder = radeon_get_external_encoder(encoder); + + radeon_encoder->pixel_clock = adjusted_mode->clock; + ++ /* need to call this here rather than in prepare() since we need some crtc info */ ++ radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); ++ + if (ASIC_IS_AVIVO(rdev) && !ASIC_IS_DCE4(rdev)) { + if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT | ATOM_DEVICE_TV_SUPPORT)) + atombios_yuv_setup(encoder, true); +@@ -1870,38 +1901,7 @@ radeon_atom_encoder_mode_set(struct drm_ + case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: + case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: + case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: +- if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) { +- struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); +- struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; +- +- if (!connector) +- dig->panel_mode = DP_PANEL_MODE_EXTERNAL_DP_MODE; +- else +- dig->panel_mode = radeon_dp_get_panel_mode(encoder, connector); +- +- /* setup and enable the encoder */ +- atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_SETUP, 0); +- atombios_dig_encoder_setup(encoder, +- ATOM_ENCODER_CMD_SETUP_PANEL_MODE, +- dig->panel_mode); +- } else if (ASIC_IS_DCE4(rdev)) { +- /* disable the transmitter */ +- atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0); +- /* setup and enable the encoder */ +- atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_SETUP, 0); +- +- /* enable the transmitter */ +- atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0); +- } else { +- /* disable the encoder and transmitter */ +- atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0); +- atombios_dig_encoder_setup(encoder, ATOM_DISABLE, 0); +- +- /* setup and enable the encoder and transmitter */ +- atombios_dig_encoder_setup(encoder, ATOM_ENABLE, 0); +- atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0); +- atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0); +- } ++ /* handled in dpms */ + break; + case ENCODER_OBJECT_ID_INTERNAL_DDI: + case ENCODER_OBJECT_ID_INTERNAL_DVO1: +@@ -1922,14 +1922,6 @@ radeon_atom_encoder_mode_set(struct drm_ + break; + } + +- if (ext_encoder) { +- if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE61(rdev)) +- atombios_external_encoder_setup(encoder, ext_encoder, +- EXTERNAL_ENCODER_ACTION_V3_ENCODER_SETUP); +- else +- atombios_external_encoder_setup(encoder, ext_encoder, ATOM_ENABLE); +- } +- + atombios_apply_encoder_quirks(encoder, adjusted_mode); + + if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI) { +@@ -2116,7 +2108,6 @@ static void radeon_atom_encoder_prepare( + } + + radeon_atom_output_lock(encoder, true); +- radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); + + if (connector) { + struct radeon_connector *radeon_connector = to_radeon_connector(connector); +@@ -2137,6 +2128,7 @@ static void radeon_atom_encoder_prepare( + + static void radeon_atom_encoder_commit(struct drm_encoder *encoder) + { ++ /* need to call this here as we need the crtc set up */ + radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_ON); + radeon_atom_output_lock(encoder, false); + } +@@ -2177,14 +2169,7 @@ static void radeon_atom_encoder_disable( + case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: + case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: + case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: +- if (ASIC_IS_DCE4(rdev)) +- /* disable the transmitter */ +- atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0); +- else { +- /* disable the encoder and transmitter */ +- atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0); +- atombios_dig_encoder_setup(encoder, ATOM_DISABLE, 0); +- } ++ /* handled in dpms */ + break; + case ENCODER_OBJECT_ID_INTERNAL_DDI: + case ENCODER_OBJECT_ID_INTERNAL_DVO1: diff --git a/queue-3.5/drm-radeon-convert-radeon-vfct-code-to-use-acpi_get_table_with_size.patch b/queue-3.5/drm-radeon-convert-radeon-vfct-code-to-use-acpi_get_table_with_size.patch new file mode 100644 index 00000000000..6073d2aac45 --- /dev/null +++ b/queue-3.5/drm-radeon-convert-radeon-vfct-code-to-use-acpi_get_table_with_size.patch @@ -0,0 +1,44 @@ +From 7c3906d04a4587dceaa78cc1ae6b14e6454ee02a Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Mon, 20 Aug 2012 11:06:21 -0400 +Subject: drm/radeon: convert radeon vfct code to use acpi_get_table_with_size + +From: Alex Deucher + +commit 7c3906d04a4587dceaa78cc1ae6b14e6454ee02a upstream. + +Allows us to verify the table size. + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/radeon_bios.c | 6 ++---- + 1 file changed, 2 insertions(+), 4 deletions(-) + +--- a/drivers/gpu/drm/radeon/radeon_bios.c ++++ b/drivers/gpu/drm/radeon/radeon_bios.c +@@ -554,13 +554,12 @@ static bool radeon_acpi_vfct_bios(struct + { + bool ret = false; + struct acpi_table_header *hdr; +- /* acpi_get_table_with_size is not exported :( */ +- acpi_size tbl_size = 0x7fffffff; ++ acpi_size tbl_size; + UEFI_ACPI_VFCT *vfct; + GOP_VBIOS_CONTENT *vbios; + VFCT_IMAGE_HEADER *vhdr; + +- if (!ACPI_SUCCESS(acpi_get_table("VFCT", 1, &hdr))) ++ if (!ACPI_SUCCESS(acpi_get_table_with_size("VFCT", 1, &hdr, &tbl_size))) + return false; + if (tbl_size < sizeof(UEFI_ACPI_VFCT)) { + DRM_ERROR("ACPI VFCT table present but broken (too short #1)\n"); +@@ -597,7 +596,6 @@ static bool radeon_acpi_vfct_bios(struct + ret = !!rdev->bios; + + out_unmap: +- /* uh, no idea what to do here... */ + return ret; + } + #else diff --git a/queue-3.5/series b/queue-3.5/series index 942d7499613..25e9a7db6fb 100644 --- a/queue-3.5/series +++ b/queue-3.5/series @@ -188,3 +188,12 @@ drm-radeon-init-lockup-timeout-on-ring-init.patch drm-i915-extract-connector-update-from-intel_ddc_get_modes-for-reuse.patch drm-i915-fall-back-to-bit-banging-if-gmbus-fails-in-crt-edid-reads.patch drm-i915-use-hsw-rps-tuning-values-everywhere-on-gen6.patch +asus-laptop-hrws-hwrs-typo.patch +drm-add-edid_quirk_force_reduced_blanking-for-asus-vw222s.patch +asus-nb-wmi-add-some-video-toggle-keys.patch +drm-check-for-invalid-cursor-flags.patch +drm-nvc0-copy-check-punits-to-determine-which-copy-engines-are-disabled.patch +drm-radeon-atom-rework-dig-modesetting-on-dce3.patch +drm-radeon-atom-powergating-fixes-for-dce6.patch +drm-i915-fix-wrong-order-of-parameters-in-port-checking.patch +drm-radeon-convert-radeon-vfct-code-to-use-acpi_get_table_with_size.patch