From: Peter Maydell Date: Sat, 1 Feb 2025 16:39:59 +0000 (+0000) Subject: target/arm: Enable FEAT_RPRES for -cpu max X-Git-Tag: v10.0.0-rc0~55^2~13 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=b0bf37746bb9d66496ce8ef076c74388aa7ef899;p=thirdparty%2Fqemu.git target/arm: Enable FEAT_RPRES for -cpu max Now the emulation is complete, we can enable FEAT_RPRES for the 'max' CPU type. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst index 63b4cdf5fb..78c2fd2113 100644 --- a/docs/system/arm/emulation.rst +++ b/docs/system/arm/emulation.rst @@ -118,6 +118,7 @@ the following architecture extensions: - FEAT_RDM (Advanced SIMD rounding double multiply accumulate instructions) - FEAT_RME (Realm Management Extension) (NB: support status in QEMU is experimental) - FEAT_RNG (Random number generator) +- FEAT_RPRES (Increased precision of FRECPE and FRSQRTE) - FEAT_S2FWB (Stage 2 forced Write-Back) - FEAT_SB (Speculation Barrier) - FEAT_SEL2 (Secure EL2) diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c index 0bc68aac17..29ab0ac79d 100644 --- a/target/arm/tcg/cpu64.c +++ b/target/arm/tcg/cpu64.c @@ -1167,6 +1167,7 @@ void aarch64_max_tcg_initfn(Object *obj) cpu->isar.id_aa64isar1 = t; t = cpu->isar.id_aa64isar2; + t = FIELD_DP64(t, ID_AA64ISAR2, RPRES, 1); /* FEAT_RPRES */ t = FIELD_DP64(t, ID_AA64ISAR2, MOPS, 1); /* FEAT_MOPS */ t = FIELD_DP64(t, ID_AA64ISAR2, BC, 1); /* FEAT_HBC */ t = FIELD_DP64(t, ID_AA64ISAR2, WFXT, 2); /* FEAT_WFxT */