From: Greg Kroah-Hartman <gregkh@suse.de>
Date: Fri, 27 Jan 2006 20:54:56 +0000 (-0800)
Subject: added pci patch
X-Git-Tag: v2.6.14.7~7
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=b11b9ac6df153c090aa54196204a4734c838ba94;p=thirdparty%2Fkernel%2Fstable-queue.git

added pci patch
---

diff --git a/queue/pci-handle-bogus-mcfg-entries.patch b/queue/pci-handle-bogus-mcfg-entries.patch
new file mode 100644
index 00000000000..2dae04837f6
--- /dev/null
+++ b/queue/pci-handle-bogus-mcfg-entries.patch
@@ -0,0 +1,89 @@
+From ak@suse.de  Fri Jan 27 09:45:26 2006
+From: Andi Kleen <ak@suse.de>
+To: Greg KH <greg@kroah.com>
+Subject: PCI: handle bogus MCFG entries
+Date: Fri, 27 Jan 2006 02:03:50 +0100
+Cc: Stephen Hemminger <shemminger@osdl.org>, Matthew Wilcox <matthew@wil.cx>
+Message-Id: <200601270203.51244.ak@suse.de>
+
+
+Handle more bogus MCFG entries
+
+Some Asus P4 boards seem to have broken MCFG tables with
+only a single entry for busses 0-0.  Special case these
+and assume they mean all busses can be accessed.
+
+Signed-off-by: Andi Kleen <ak@suse.de>
+Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
+
+---
+ arch/i386/pci/mmconfig.c   |   15 +++++++++++++--
+ arch/x86_64/pci/mmconfig.c |   19 ++++++++++++++-----
+ 2 files changed, 27 insertions(+), 7 deletions(-)
+
+--- gregkh-2.6.orig/arch/i386/pci/mmconfig.c
++++ gregkh-2.6/arch/i386/pci/mmconfig.c
+@@ -36,8 +36,7 @@ static u32 get_base_addr(unsigned int se
+ 	while (1) {
+ 		++cfg_num;
+ 		if (cfg_num >= pci_mmcfg_config_num) {
+-			/* Not found - fallback to type 1 */
+-			return 0;
++			break;
+ 		}
+ 		cfg = &pci_mmcfg_config[cfg_num];
+ 		if (cfg->pci_segment_group_number != seg)
+@@ -46,6 +45,18 @@ static u32 get_base_addr(unsigned int se
+ 		    (cfg->end_bus_number >= bus))
+ 			return cfg->base_address;
+ 	}
++
++	/* Handle more broken MCFG tables on Asus etc.
++	   They only contain a single entry for bus 0-0. Assume
++ 	   this applies to all busses. */
++	cfg = &pci_mmcfg_config[0];
++	if (pci_mmcfg_config_num == 1 &&
++		cfg->pci_segment_group_number == 0 &&
++		(cfg->start_bus_number | cfg->end_bus_number) == 0)
++		return cfg->base_address;
++
++	/* Fall back to type 0 */
++	return 0;
+ }
+ 
+ static inline void pci_exp_set_dev_base(unsigned int base, int bus, int devfn)
+--- gregkh-2.6.orig/arch/x86_64/pci/mmconfig.c
++++ gregkh-2.6/arch/x86_64/pci/mmconfig.c
+@@ -29,11 +29,8 @@ static char __iomem *get_virt(unsigned i
+ 
+ 	while (1) {
+ 		++cfg_num;
+-		if (cfg_num >= pci_mmcfg_config_num) {
+-			/* Not found - fall back to type 1. This happens
+-			   e.g. on the internal devices of a K8 northbridge. */
+-			return NULL;
+-		}
++		if (cfg_num >= pci_mmcfg_config_num)
++			break;
+ 		cfg = pci_mmcfg_virt[cfg_num].cfg;
+ 		if (cfg->pci_segment_group_number != seg)
+ 			continue;
+@@ -41,6 +38,18 @@ static char __iomem *get_virt(unsigned i
+ 		    (cfg->end_bus_number >= bus))
+ 			return pci_mmcfg_virt[cfg_num].virt;
+ 	}
++
++	/* Handle more broken MCFG tables on Asus etc.
++	   They only contain a single entry for bus 0-0. Assume
++ 	   this applies to all busses. */
++	cfg = &pci_mmcfg_config[0];
++	if (pci_mmcfg_config_num == 1 &&
++		cfg->pci_segment_group_number == 0 &&
++		(cfg->start_bus_number | cfg->end_bus_number) == 0)
++		return cfg->base_address;
++
++	/* Fall back to type 0 */
++	return 0;
+ }
+ 
+ static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn)
diff --git a/queue/series b/queue/series
index 738fa17236a..c02dc67c670 100644
--- a/queue/series
+++ b/queue/series
@@ -7,3 +7,4 @@ elevator-as-back-compatibility.patch
 sparc64-fix-timekeeping-on-ultra-IIe-machines.patch
 net-make-second-arg-to-skb_reserved-signed.patch
 mask-off-GFP-flags-before-swiotlb_alloc_coherent.patch
+pci-handle-bogus-mcfg-entries.patch