From: Greg Kroah-Hartman Date: Tue, 20 Mar 2018 10:57:03 +0000 (+0100) Subject: drop net-mvpp2-set-dma-mask-and-coherent-dma-mask-on-ppv2.2.patch from 3.18 X-Git-Tag: v4.15.12~2 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=b1ca94a2ec86396970f5e63709ae5d2e1404a0d5;p=thirdparty%2Fkernel%2Fstable-queue.git drop net-mvpp2-set-dma-mask-and-coherent-dma-mask-on-ppv2.2.patch from 3.18 --- diff --git a/queue-3.18/net-mvpp2-set-dma-mask-and-coherent-dma-mask-on-ppv2.2.patch b/queue-3.18/net-mvpp2-set-dma-mask-and-coherent-dma-mask-on-ppv2.2.patch deleted file mode 100644 index 05911f97a05..00000000000 --- a/queue-3.18/net-mvpp2-set-dma-mask-and-coherent-dma-mask-on-ppv2.2.patch +++ /dev/null @@ -1,48 +0,0 @@ -From foo@baz Mon Mar 19 10:11:52 CET 2018 -From: Thomas Petazzoni -Date: Tue, 7 Mar 2017 16:53:19 +0100 -Subject: net: mvpp2: set dma mask and coherent dma mask on PPv2.2 - -From: Thomas Petazzoni - - -[ Upstream commit 2067e0a13cfe0b1bdca7b91bc5e4f2740b07d478 ] - -On PPv2.2, the streaming mappings can be anywhere in the first 40 bits -of the physical address space. However, for the coherent mappings, we -still need them to be in the first 32 bits of the address space, -because all BM pools share a single register to store the high 32 bits -of the BM pool address, which means all BM pools must be allocated in -the same 4GB memory area. - -Signed-off-by: Thomas Petazzoni -Signed-off-by: David S. Miller -Signed-off-by: Sasha Levin -Signed-off-by: Greg Kroah-Hartman ---- - drivers/net/ethernet/marvell/mvpp2.c | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) - ---- a/drivers/net/ethernet/marvell/mvpp2.c -+++ b/drivers/net/ethernet/marvell/mvpp2.c -@@ -6339,6 +6339,20 @@ static int mvpp2_probe(struct platform_d - /* Get system's tclk rate */ - priv->tclk = clk_get_rate(priv->pp_clk); - -+ if (priv->hw_version == MVPP22) { -+ err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(40)); -+ if (err) -+ goto err_mg_clk; -+ /* Sadly, the BM pools all share the same register to -+ * store the high 32 bits of their address. So they -+ * must all have the same high 32 bits, which forces -+ * us to restrict coherent memory to DMA_BIT_MASK(32). -+ */ -+ err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); -+ if (err) -+ goto err_mg_clk; -+ } -+ - /* Initialize network controller */ - err = mvpp2_init(pdev, priv); - if (err < 0) { diff --git a/queue-3.18/series b/queue-3.18/series index cbd143c8757..8029fd1d8af 100644 --- a/queue-3.18/series +++ b/queue-3.18/series @@ -1,6 +1,5 @@ input-tsc2007-check-for-presence-and-power-down-tsc2007-during-probe.patch hid-reject-input-outside-logical-range-only-if-null-state-is-set.patch -net-mvpp2-set-dma-mask-and-coherent-dma-mask-on-ppv2.2.patch pci-msi-stop-disabling-msi-msi-x-in-pci_device_shutdown.patch selinux-check-for-address-length-in-selinux_socket_bind.patch perf-tools-make-perf_event__synthesize_mmap_events-scale.patch