From: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: Fri, 9 Feb 2024 07:47:48 +0000 (+0100)
Subject: target/mips: Remove MIPSITUState::itu field
X-Git-Tag: v9.0.0-rc0~59^2~50
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=b267e78908afd450433ef44d840c4ff30ba37676;p=thirdparty%2Fqemu.git

target/mips: Remove MIPSITUState::itu field

Previous commits removed the MT*C0(SAAR) helpers which
were using CPUMIPSState::itu, we can now remove it too.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240209090513.9401-4-philmd@linaro.org>
---

diff --git a/hw/mips/cps.c b/hw/mips/cps.c
index 4f12e23ab5b..988ceaa0b96 100644
--- a/hw/mips/cps.c
+++ b/hw/mips/cps.c
@@ -96,7 +96,6 @@ static void mips_cps_realize(DeviceState *dev, Error **errp)
             itu_present = true;
             /* Attach ITC Tag to the VP */
             env->itc_tag = mips_itu_get_tag_region(&s->itu);
-            env->itu = &s->itu;
         }
         qemu_register_reset(main_cpu_reset, cpu);
     }
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index b4788e1af25..d54e9a4a1cd 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1184,7 +1184,6 @@ typedef struct CPUArchState {
 #if !defined(CONFIG_USER_ONLY)
     CPUMIPSTLBContext *tlb;
     qemu_irq irq[8];
-    struct MIPSITUState *itu;
     MemoryRegion *itc_tag; /* ITC Configuration Tags */
 
     /* Loongson IOCSR memory */