From: Joseph Myers Date: Wed, 25 May 2016 17:42:22 +0000 (+0000) Subject: Do not raise "inexact" from powerpc64 ceil, floor, trunc (bug 15479). X-Git-Tag: glibc-2.24~197 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=b4d80349bb8b91fd64d6e860af5c0bd503b15f97;p=thirdparty%2Fglibc.git Do not raise "inexact" from powerpc64 ceil, floor, trunc (bug 15479). Continuing fixes for ceil, floor and trunc functions not to raise the "inexact" exception, this patch fixes the versions used on older powerpc64 processors. As was done with the round implementations some time ago, the save of floating-point state is moved after the first floating-point operation on the input to ensure that any "invalid" exception from signaling NaN input is included in the saved state, and then the whole state gets restored rather than just the rounding mode. This has no effect on configurations using the power5+ code, since such processors can do these operations with a single instruction (and those instructions do not set "inexact", so are correct for TS 18661-1 semantics). Tested for powerpc64. [BZ #15479] * sysdeps/powerpc/powerpc64/fpu/s_ceil.S (__ceil): Move save of floating-point state after first floating-point operation on input. Restore full floating-point state instead of just rounding mode. * sysdeps/powerpc/powerpc64/fpu/s_ceilf.S (__ceilf): Likewise. * sysdeps/powerpc/powerpc64/fpu/s_floor.S (__floor): Likewise. * sysdeps/powerpc/powerpc64/fpu/s_floorf.S (__floorf): Likewise. * sysdeps/powerpc/powerpc64/fpu/s_trunc.S (__trunc): Likewise. * sysdeps/powerpc/powerpc64/fpu/s_truncf.S (__truncf): Likewise. --- diff --git a/ChangeLog b/ChangeLog index 45645718094..89c2a9c0f58 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,5 +1,16 @@ 2016-05-25 Joseph Myers + [BZ #15479] + * sysdeps/powerpc/powerpc64/fpu/s_ceil.S (__ceil): Move save of + floating-point state after first floating-point operation on + input. Restore full floating-point state instead of just rounding + mode. + * sysdeps/powerpc/powerpc64/fpu/s_ceilf.S (__ceilf): Likewise. + * sysdeps/powerpc/powerpc64/fpu/s_floor.S (__floor): Likewise. + * sysdeps/powerpc/powerpc64/fpu/s_floorf.S (__floorf): Likewise. + * sysdeps/powerpc/powerpc64/fpu/s_trunc.S (__trunc): Likewise. + * sysdeps/powerpc/powerpc64/fpu/s_truncf.S (__truncf): Likewise. + [BZ #15479] * sysdeps/powerpc/powerpc32/fpu/s_ceil.S (__ceil): Move save of floating-point state after first floating-point operation on diff --git a/sysdeps/powerpc/powerpc64/fpu/s_ceil.S b/sysdeps/powerpc/powerpc64/fpu/s_ceil.S index 77fe0f3c962..d2f96bb628d 100644 --- a/sysdeps/powerpc/powerpc64/fpu/s_ceil.S +++ b/sysdeps/powerpc/powerpc64/fpu/s_ceil.S @@ -26,11 +26,12 @@ EALIGN (__ceil, 4, 0) CALL_MCOUNT 0 - mffs fp11 /* Save current FPU rounding mode. */ lfd fp13,.LC0@toc(2) fabs fp0,fp1 fsub fp12,fp13,fp13 /* generate 0.0 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ bnllr- cr7 mtfsfi 7,2 /* Set rounding mode toward +inf. */ @@ -39,7 +40,8 @@ EALIGN (__ceil, 4, 0) fsub fp1,fp1,fp13 /* x-= TWO52; */ fabs fp1,fp1 /* if (x == 0.0) */ /* x = 0.0; */ - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr .L4: bge- cr6,.L9 /* if (x < 0.0) */ @@ -48,7 +50,8 @@ EALIGN (__ceil, 4, 0) fnabs fp1,fp1 /* if (x == 0.0) */ /* x = -0.0; */ .L9: - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr END (__ceil) diff --git a/sysdeps/powerpc/powerpc64/fpu/s_ceilf.S b/sysdeps/powerpc/powerpc64/fpu/s_ceilf.S index 91d4a25ae15..ed944912a96 100644 --- a/sysdeps/powerpc/powerpc64/fpu/s_ceilf.S +++ b/sysdeps/powerpc/powerpc64/fpu/s_ceilf.S @@ -27,11 +27,12 @@ EALIGN (__ceilf, 4, 0) CALL_MCOUNT 0 - mffs fp11 /* Save current FPU rounding mode. */ lfs fp13,.LC0@toc(2) fabs fp0,fp1 fsubs fp12,fp13,fp13 /* generate 0.0 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ bnllr- cr7 mtfsfi 7,2 /* Set rounding mode toward +inf. */ @@ -40,7 +41,8 @@ EALIGN (__ceilf, 4, 0) fsubs fp1,fp1,fp13 /* x-= TWO23; */ fabs fp1,fp1 /* if (x == 0.0) */ /* x = 0.0; */ - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr .L4: bge- cr6,.L9 /* if (x < 0.0) */ @@ -49,7 +51,8 @@ EALIGN (__ceilf, 4, 0) fnabs fp1,fp1 /* if (x == 0.0) */ /* x = -0.0; */ .L9: - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr END (__ceilf) diff --git a/sysdeps/powerpc/powerpc64/fpu/s_floor.S b/sysdeps/powerpc/powerpc64/fpu/s_floor.S index afa08b70c42..a3047524239 100644 --- a/sysdeps/powerpc/powerpc64/fpu/s_floor.S +++ b/sysdeps/powerpc/powerpc64/fpu/s_floor.S @@ -26,11 +26,12 @@ EALIGN (__floor, 4, 0) CALL_MCOUNT 0 - mffs fp11 /* Save current FPU rounding mode. */ lfd fp13,.LC0@toc(2) fabs fp0,fp1 fsub fp12,fp13,fp13 /* generate 0.0 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ bnllr- cr7 mtfsfi 7,3 /* Set rounding mode toward -inf. */ @@ -39,7 +40,8 @@ EALIGN (__floor, 4, 0) fsub fp1,fp1,fp13 /* x-= TWO52; */ fabs fp1,fp1 /* if (x == 0.0) */ /* x = 0.0; */ - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr .L4: bge- cr6,.L9 /* if (x < 0.0) */ @@ -48,7 +50,8 @@ EALIGN (__floor, 4, 0) fnabs fp1,fp1 /* if (x == 0.0) */ /* x = -0.0; */ .L9: - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr END (__floor) diff --git a/sysdeps/powerpc/powerpc64/fpu/s_floorf.S b/sysdeps/powerpc/powerpc64/fpu/s_floorf.S index 80080ca0b6a..24e76b05682 100644 --- a/sysdeps/powerpc/powerpc64/fpu/s_floorf.S +++ b/sysdeps/powerpc/powerpc64/fpu/s_floorf.S @@ -27,11 +27,12 @@ EALIGN (__floorf, 4, 0) CALL_MCOUNT 0 - mffs fp11 /* Save current FPU rounding mode. */ lfs fp13,.LC0@toc(2) fabs fp0,fp1 fsubs fp12,fp13,fp13 /* generate 0.0 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ bnllr- cr7 mtfsfi 7,3 /* Set rounding mode toward -inf. */ @@ -40,7 +41,8 @@ EALIGN (__floorf, 4, 0) fsubs fp1,fp1,fp13 /* x-= TWO23; */ fabs fp1,fp1 /* if (x == 0.0) */ /* x = 0.0; */ - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr .L4: bge- cr6,.L9 /* if (x < 0.0) */ @@ -49,7 +51,8 @@ EALIGN (__floorf, 4, 0) fnabs fp1,fp1 /* if (x == 0.0) */ /* x = -0.0; */ .L9: - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr END (__floorf) diff --git a/sysdeps/powerpc/powerpc64/fpu/s_trunc.S b/sysdeps/powerpc/powerpc64/fpu/s_trunc.S index 4ad939ebc46..f310c317c33 100644 --- a/sysdeps/powerpc/powerpc64/fpu/s_trunc.S +++ b/sysdeps/powerpc/powerpc64/fpu/s_trunc.S @@ -33,11 +33,12 @@ EALIGN (__trunc, 4, 0) CALL_MCOUNT 0 - mffs fp11 /* Save current FPU rounding mode. */ lfd fp13,.LC0@toc(2) fabs fp0,fp1 fsub fp12,fp13,fp13 /* generate 0.0 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO52) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ bnllr- cr7 mtfsfi 7,1 /* Set rounding toward 0 mode. */ @@ -46,7 +47,8 @@ EALIGN (__trunc, 4, 0) fsub fp1,fp1,fp13 /* x-= TWO52; */ fabs fp1,fp1 /* if (x == 0.0) */ /* x = 0.0; */ - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr .L4: bge- cr6,.L9 /* if (x < 0.0) */ @@ -55,7 +57,8 @@ EALIGN (__trunc, 4, 0) fnabs fp1,fp1 /* if (x == 0.0) */ /* x = -0.0; */ .L9: - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr END (__trunc) diff --git a/sysdeps/powerpc/powerpc64/fpu/s_truncf.S b/sysdeps/powerpc/powerpc64/fpu/s_truncf.S index 3a990550d63..b4fce645cd6 100644 --- a/sysdeps/powerpc/powerpc64/fpu/s_truncf.S +++ b/sysdeps/powerpc/powerpc64/fpu/s_truncf.S @@ -34,11 +34,12 @@ EALIGN (__truncf, 4, 0) CALL_MCOUNT 0 - mffs fp11 /* Save current FPU rounding mode. */ lfs fp13,.LC0@toc(2) fabs fp0,fp1 fsubs fp12,fp13,fp13 /* generate 0.0 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */ + mffs fp11 /* Save current FPU rounding mode and + "inexact" state. */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ bnllr- cr7 mtfsfi 7,1 /* Set rounding toward 0 mode. */ @@ -47,7 +48,8 @@ EALIGN (__truncf, 4, 0) fsubs fp1,fp1,fp13 /* x-= TWO23; */ fabs fp1,fp1 /* if (x == 0.0) */ /* x = 0.0; */ - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr .L4: bge- cr6,.L9 /* if (x < 0.0) */ @@ -56,7 +58,8 @@ EALIGN (__truncf, 4, 0) fnabs fp1,fp1 /* if (x == 0.0) */ /* x = -0.0; */ .L9: - mtfsf 0x01,fp11 /* restore previous rounding mode. */ + mtfsf 0xff,fp11 /* Restore previous rounding mode and + "inexact" state. */ blr END (__truncf)