From: Kishon Vijay Abraham I Date: Mon, 25 Mar 2019 09:45:25 +0000 (+0530) Subject: ARM: dts: dra7: Add properties to enable PCIe x2 lane mode X-Git-Tag: v5.2-rc1~45^2~33^2~6 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=b5acec09e259d9972b0e82e3a97ca019f0df29bb;p=thirdparty%2Fkernel%2Flinux.git ARM: dts: dra7: Add properties to enable PCIe x2 lane mode ti,syscon-lane-sel and ti,syscon-lane-conf properties specific to enable PCIe x2 lane mode are added here. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Sekhar Nori Signed-off-by: Tony Lindgren --- diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 2bc9add8b7a50..d87e932f45bde 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -193,6 +193,7 @@ ti,hwmods = "pcie1"; phys = <&pcie1_phy>; phy-names = "pcie-phy0"; + ti,syscon-lane-sel = <&scm_conf_pcie 0x18>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &pcie1_intc 1>, <0 0 0 2 &pcie1_intc 2>, @@ -218,6 +219,7 @@ phys = <&pcie1_phy>; phy-names = "pcie-phy0"; ti,syscon-unaligned-access = <&scm_conf1 0x14 1>; + ti,syscon-lane-sel = <&scm_conf_pcie 0x18>; status = "disabled"; }; };