From: Greg Kroah-Hartman Date: Mon, 20 Jul 2020 13:39:46 +0000 (+0200) Subject: 5.4-stable patches X-Git-Tag: v4.4.231~4 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=b675afb68bf03fcffc60f6df67b3e495bb3c23ad;p=thirdparty%2Fkernel%2Fstable-queue.git 5.4-stable patches added patches: drm-i915-gvt-fix-two-cfl-mmio-handling-caused-by-regression.patch gpio-pca953x-disable-regmap-locking-for-automatic-address-incrementing.patch iommu-vt-d-make-intel-svm-code-64-bit-only.patch ionic-export-features-for-vlans-to-use.patch libceph-don-t-omit-recovery_deletes-in-target_copy.patch rxrpc-fix-trace-string.patch spi-sprd-switch-the-sequence-of-setting-wdg_load_low-and-_high.patch --- diff --git a/queue-5.4/drm-i915-gvt-fix-two-cfl-mmio-handling-caused-by-regression.patch b/queue-5.4/drm-i915-gvt-fix-two-cfl-mmio-handling-caused-by-regression.patch new file mode 100644 index 00000000000..4d308ad9616 --- /dev/null +++ b/queue-5.4/drm-i915-gvt-fix-two-cfl-mmio-handling-caused-by-regression.patch @@ -0,0 +1,40 @@ +From fccd0f7cf4d532674d727c7f204f038456675dee Mon Sep 17 00:00:00 2001 +From: Colin Xu +Date: Mon, 1 Jun 2020 11:06:38 +0800 +Subject: drm/i915/gvt: Fix two CFL MMIO handling caused by regression. + +From: Colin Xu + +commit fccd0f7cf4d532674d727c7f204f038456675dee upstream. + +D_CFL was incorrectly removed for: +GAMT_CHKN_BIT_REG +GEN9_CTX_PREEMPT_REG + +V2: Update commit message. +V3: Rebase and split Fixes and mis-handled MMIO. + +Fixes: 43226e6fe798 (drm/i915/gvt: replaced register address with name) +Reviewed-by: Zhenyu Wang +Signed-off-by: Colin Xu +Signed-off-by: Zhenyu Wang +Link: http://patchwork.freedesktop.org/patch/msgid/20200601030638.16002-1-colin.xu@intel.com +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/gvt/handlers.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/i915/gvt/handlers.c ++++ b/drivers/gpu/drm/i915/gvt/handlers.c +@@ -3103,8 +3103,8 @@ static int init_skl_mmio_info(struct int + MMIO_DFH(GEN9_WM_CHICKEN3, D_SKL_PLUS, F_MODE_MASK | F_CMD_ACCESS, + NULL, NULL); + +- MMIO_D(GAMT_CHKN_BIT_REG, D_KBL); +- MMIO_D(GEN9_CTX_PREEMPT_REG, D_KBL | D_SKL); ++ MMIO_D(GAMT_CHKN_BIT_REG, D_KBL | D_CFL); ++ MMIO_D(GEN9_CTX_PREEMPT_REG, D_SKL_PLUS); + + return 0; + } diff --git a/queue-5.4/gpio-pca953x-disable-regmap-locking-for-automatic-address-incrementing.patch b/queue-5.4/gpio-pca953x-disable-regmap-locking-for-automatic-address-incrementing.patch new file mode 100644 index 00000000000..db93b6926cf --- /dev/null +++ b/queue-5.4/gpio-pca953x-disable-regmap-locking-for-automatic-address-incrementing.patch @@ -0,0 +1,41 @@ +From ec3decd21380081e3b5de4ba8d85d90a95f201a0 Mon Sep 17 00:00:00 2001 +From: Andy Shevchenko +Date: Fri, 5 Jun 2020 16:40:36 +0300 +Subject: gpio: pca953x: disable regmap locking for automatic address incrementing +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Andy Shevchenko + +commit ec3decd21380081e3b5de4ba8d85d90a95f201a0 upstream. + +It's a repetition of the commit aa58a21ae378 + ("gpio: pca953x: disable regmap locking") +which states the following: + + This driver uses its own locking but regmap silently uses + a mutex for all operations too. Add the option to disable + locking to the regmap config struct. + +Fixes: bcf41dc480b1 ("gpio: pca953x: fix handling of automatic address incrementing") +Cc: Uwe Kleine-König +Signed-off-by: Andy Shevchenko +Reviewed-by: Uwe Kleine-König +Signed-off-by: Bartosz Golaszewski +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpio/gpio-pca953x.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/gpio/gpio-pca953x.c ++++ b/drivers/gpio/gpio-pca953x.c +@@ -398,6 +398,7 @@ static const struct regmap_config pca953 + .writeable_reg = pca953x_writeable_register, + .volatile_reg = pca953x_volatile_register, + ++ .disable_locking = true, + .cache_type = REGCACHE_RBTREE, + .max_register = 0x7f, + }; diff --git a/queue-5.4/iommu-vt-d-make-intel-svm-code-64-bit-only.patch b/queue-5.4/iommu-vt-d-make-intel-svm-code-64-bit-only.patch new file mode 100644 index 00000000000..6000a97d10d --- /dev/null +++ b/queue-5.4/iommu-vt-d-make-intel-svm-code-64-bit-only.patch @@ -0,0 +1,38 @@ +From 9486727f5981a5ec5c0b699fb1777451bd6786e4 Mon Sep 17 00:00:00 2001 +From: Lu Baolu +Date: Tue, 23 Jun 2020 07:13:40 +0800 +Subject: iommu/vt-d: Make Intel SVM code 64-bit only + +From: Lu Baolu + +commit 9486727f5981a5ec5c0b699fb1777451bd6786e4 upstream. + +Current Intel SVM is designed by setting the pgd_t of the processor page +table to FLPTR field of the PASID entry. The first level translation only +supports 4 and 5 level paging structures, hence it's infeasible for the +IOMMU to share a processor's page table when it's running in 32-bit mode. +Let's disable 32bit support for now and claim support only when all the +missing pieces are ready in the future. + +Fixes: 1c4f88b7f1f92 ("iommu/vt-d: Shared virtual address in scalable mode") +Suggested-by: Joerg Roedel +Signed-off-by: Lu Baolu +Link: https://lore.kernel.org/r/20200622231345.29722-2-baolu.lu@linux.intel.com +Signed-off-by: Joerg Roedel +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/iommu/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/iommu/Kconfig ++++ b/drivers/iommu/Kconfig +@@ -205,7 +205,7 @@ config INTEL_IOMMU_DEBUGFS + + config INTEL_IOMMU_SVM + bool "Support for Shared Virtual Memory with Intel IOMMU" +- depends on INTEL_IOMMU && X86 ++ depends on INTEL_IOMMU && X86_64 + select PCI_PASID + select MMU_NOTIFIER + help diff --git a/queue-5.4/ionic-export-features-for-vlans-to-use.patch b/queue-5.4/ionic-export-features-for-vlans-to-use.patch new file mode 100644 index 00000000000..2c17cb9c3ff --- /dev/null +++ b/queue-5.4/ionic-export-features-for-vlans-to-use.patch @@ -0,0 +1,31 @@ +From ef7232da6bcd4294cbb2d424bc35885721570f01 Mon Sep 17 00:00:00 2001 +From: Shannon Nelson +Date: Tue, 16 Jun 2020 08:06:26 -0700 +Subject: ionic: export features for vlans to use + +From: Shannon Nelson + +commit ef7232da6bcd4294cbb2d424bc35885721570f01 upstream. + +Set up vlan_features for use by any vlans above us. + +Fixes: beead698b173 ("ionic: Add the basic NDO callbacks for netdev support") +Signed-off-by: Shannon Nelson +Acked-by: Jonathan Toppins +Signed-off-by: David S. Miller +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/ethernet/pensando/ionic/ionic_lif.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/net/ethernet/pensando/ionic/ionic_lif.c ++++ b/drivers/net/ethernet/pensando/ionic/ionic_lif.c +@@ -1187,6 +1187,7 @@ static int ionic_init_nic_features(struc + + netdev->hw_features |= netdev->hw_enc_features; + netdev->features |= netdev->hw_features; ++ netdev->vlan_features |= netdev->features & ~NETIF_F_VLAN_FEATURES; + + netdev->priv_flags |= IFF_UNICAST_FLT; + diff --git a/queue-5.4/libceph-don-t-omit-recovery_deletes-in-target_copy.patch b/queue-5.4/libceph-don-t-omit-recovery_deletes-in-target_copy.patch new file mode 100644 index 00000000000..03e4188e5f1 --- /dev/null +++ b/queue-5.4/libceph-don-t-omit-recovery_deletes-in-target_copy.patch @@ -0,0 +1,32 @@ +From 2f3fead62144002557f322c2a7c15e1255df0653 Mon Sep 17 00:00:00 2001 +From: Ilya Dryomov +Date: Tue, 9 Jun 2020 11:57:56 +0200 +Subject: libceph: don't omit recovery_deletes in target_copy() + +From: Ilya Dryomov + +commit 2f3fead62144002557f322c2a7c15e1255df0653 upstream. + +Currently target_copy() is used only for sending linger pings, so +this doesn't come up, but generally omitting recovery_deletes can +result in unneeded resends (force_resend in calc_target()). + +Fixes: ae78dd8139ce ("libceph: make RECOVERY_DELETES feature create a new interval") +Signed-off-by: Ilya Dryomov +Reviewed-by: Jeff Layton +Signed-off-by: Greg Kroah-Hartman + +--- + net/ceph/osd_client.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/net/ceph/osd_client.c ++++ b/net/ceph/osd_client.c +@@ -445,6 +445,7 @@ static void target_copy(struct ceph_osd_ + dest->size = src->size; + dest->min_size = src->min_size; + dest->sort_bitwise = src->sort_bitwise; ++ dest->recovery_deletes = src->recovery_deletes; + + dest->flags = src->flags; + dest->paused = src->paused; diff --git a/queue-5.4/rxrpc-fix-trace-string.patch b/queue-5.4/rxrpc-fix-trace-string.patch new file mode 100644 index 00000000000..c7f4e4d5c07 --- /dev/null +++ b/queue-5.4/rxrpc-fix-trace-string.patch @@ -0,0 +1,34 @@ +From aadf9dcef9d4cd68c73a4ab934f93319c4becc47 Mon Sep 17 00:00:00 2001 +From: David Howells +Date: Wed, 17 Jun 2020 22:50:33 +0100 +Subject: rxrpc: Fix trace string + +From: David Howells + +commit aadf9dcef9d4cd68c73a4ab934f93319c4becc47 upstream. + +The trace symbol printer (__print_symbolic()) ignores symbols that map to +an empty string and prints the hex value instead. + +Fix the symbol for rxrpc_cong_no_change to " -" instead of "" to avoid +this. + +Fixes: b54a134a7de4 ("rxrpc: Fix handling of enums-to-string translation in tracing") +Signed-off-by: David Howells +Signed-off-by: Greg Kroah-Hartman + +--- + include/trace/events/rxrpc.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/include/trace/events/rxrpc.h ++++ b/include/trace/events/rxrpc.h +@@ -400,7 +400,7 @@ enum rxrpc_tx_point { + EM(rxrpc_cong_begin_retransmission, " Retrans") \ + EM(rxrpc_cong_cleared_nacks, " Cleared") \ + EM(rxrpc_cong_new_low_nack, " NewLowN") \ +- EM(rxrpc_cong_no_change, "") \ ++ EM(rxrpc_cong_no_change, " -") \ + EM(rxrpc_cong_progress, " Progres") \ + EM(rxrpc_cong_retransmit_again, " ReTxAgn") \ + EM(rxrpc_cong_rtt_window_end, " RttWinE") \ diff --git a/queue-5.4/series b/queue-5.4/series index 1e56b841e0b..d75f1e9b058 100644 --- a/queue-5.4/series +++ b/queue-5.4/series @@ -207,3 +207,10 @@ drm-amdgpu-sdma5-fix-wptr-overwritten-in-get_wptr.patch drm-i915-gt-ignore-irq-enabling-on-the-virtual-engines.patch block-fix-splitting-segments-on-boundary-masks.patch block-fix-get_max_segment_size-overflow-on-32bit-arch.patch +libceph-don-t-omit-recovery_deletes-in-target_copy.patch +rxrpc-fix-trace-string.patch +spi-sprd-switch-the-sequence-of-setting-wdg_load_low-and-_high.patch +ionic-export-features-for-vlans-to-use.patch +iommu-vt-d-make-intel-svm-code-64-bit-only.patch +drm-i915-gvt-fix-two-cfl-mmio-handling-caused-by-regression.patch +gpio-pca953x-disable-regmap-locking-for-automatic-address-incrementing.patch diff --git a/queue-5.4/spi-sprd-switch-the-sequence-of-setting-wdg_load_low-and-_high.patch b/queue-5.4/spi-sprd-switch-the-sequence-of-setting-wdg_load_low-and-_high.patch new file mode 100644 index 00000000000..cc49f0b4686 --- /dev/null +++ b/queue-5.4/spi-sprd-switch-the-sequence-of-setting-wdg_load_low-and-_high.patch @@ -0,0 +1,36 @@ +From 8bdd79dae1ff5397351b95e249abcae126572617 Mon Sep 17 00:00:00 2001 +From: Lingling Xu +Date: Tue, 2 Jun 2020 16:24:15 +0800 +Subject: spi: sprd: switch the sequence of setting WDG_LOAD_LOW and _HIGH + +From: Lingling Xu + +commit 8bdd79dae1ff5397351b95e249abcae126572617 upstream. + +The watchdog counter consists of WDG_LOAD_LOW and WDG_LOAD_HIGH, +which would be loaded to watchdog counter once writing WDG_LOAD_LOW. + +Fixes: ac1775012058 ("spi: sprd: Add the support of restarting the system") +Signed-off-by: Lingling Xu +Signed-off-by: Chunyan Zhang +Link: https://lore.kernel.org/r/20200602082415.5848-1-zhang.lyra@gmail.com +Signed-off-by: Mark Brown +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/spi/spi-sprd-adi.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/spi/spi-sprd-adi.c ++++ b/drivers/spi/spi-sprd-adi.c +@@ -384,9 +384,9 @@ static int sprd_adi_restart_handler(stru + sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_LOCK, WDG_UNLOCK_KEY); + + /* Load the watchdog timeout value, 50ms is always enough. */ ++ sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_LOAD_HIGH, 0); + sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_LOAD_LOW, + WDG_LOAD_VAL & WDG_LOAD_MASK); +- sprd_adi_write(sadi, sadi->slave_pbase + REG_WDG_LOAD_HIGH, 0); + + /* Start the watchdog to reset system */ + sprd_adi_read(sadi, sadi->slave_pbase + REG_WDG_CTRL, &val);