From: Greg Kroah-Hartman Date: Sun, 1 May 2022 17:18:55 +0000 (+0200) Subject: 5.17-stable patches X-Git-Tag: v5.4.192~54 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=b6bf42dc5b8b2d283174cfdf3f8ed50cfbedb83d;p=thirdparty%2Fkernel%2Fstable-queue.git 5.17-stable patches added patches: arm64-dts-imx8mm-venice-fix-spi2-pin-configuration.patch bus-mhi-host-pci_generic-add-missing-poweroff-pm-callback.patch bus-mhi-host-pci_generic-flush-recovery-worker-during-freeze.patch f2fs-should-not-truncate-blocks-during-roll-forward-recovery.patch hex2bin-fix-access-beyond-string-end.patch hex2bin-make-the-function-hex_to_bin-constant-time.patch pinctrl-samsung-fix-missing-gpiolib-on-arm64-exynos-config.patch --- diff --git a/queue-5.17/arm64-dts-imx8mm-venice-fix-spi2-pin-configuration.patch b/queue-5.17/arm64-dts-imx8mm-venice-fix-spi2-pin-configuration.patch new file mode 100644 index 00000000000..e0de2d9ddc7 --- /dev/null +++ b/queue-5.17/arm64-dts-imx8mm-venice-fix-spi2-pin-configuration.patch @@ -0,0 +1,62 @@ +From dc900431337f5f861e3cc47ec5be5a69db40ee34 Mon Sep 17 00:00:00 2001 +From: Johan Hovold +Date: Mon, 28 Feb 2022 11:16:17 +0100 +Subject: arm64: dts: imx8mm-venice: fix spi2 pin configuration + +From: Johan Hovold + +commit dc900431337f5f861e3cc47ec5be5a69db40ee34 upstream. + +Due to what looks like a copy-paste error, the ECSPI2_MISO pad is not +muxed for SPI mode and causes reads from a slave-device connected to the +SPI header to always return zero. + +Configure the ECSPI2_MISO pad for SPI mode on the gw71xx, gw72xx and +gw73xx families of boards that got this wrong. + +Fixes: 6f30b27c5ef5 ("arm64: dts: imx8mm: Add Gateworks i.MX 8M Mini Development Kits") +Cc: stable@vger.kernel.org # 5.12 +Cc: Tim Harvey +Signed-off-by: Johan Hovold +Acked-by: Tim Harvey +Signed-off-by: Shawn Guo +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi | 2 +- + arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi | 2 +- + arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi | 2 +- + 3 files changed, 3 insertions(+), 3 deletions(-) + +--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi +@@ -166,7 +166,7 @@ + fsl,pins = < + MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6 + MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6 +- MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6 ++ MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6 + MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6 + >; + }; +--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi +@@ -231,7 +231,7 @@ + fsl,pins = < + MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6 + MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6 +- MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6 ++ MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6 + MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6 + >; + }; +--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi +@@ -280,7 +280,7 @@ + fsl,pins = < + MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6 + MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0xd6 +- MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0xd6 ++ MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0xd6 + MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0xd6 + >; + }; diff --git a/queue-5.17/bus-mhi-host-pci_generic-add-missing-poweroff-pm-callback.patch b/queue-5.17/bus-mhi-host-pci_generic-add-missing-poweroff-pm-callback.patch new file mode 100644 index 00000000000..988e8b7df0e --- /dev/null +++ b/queue-5.17/bus-mhi-host-pci_generic-add-missing-poweroff-pm-callback.patch @@ -0,0 +1,42 @@ +From e64d5fa5044f225ac87d96a7e4be11389999c4c6 Mon Sep 17 00:00:00 2001 +From: Manivannan Sadhasivam +Date: Tue, 5 Apr 2022 18:29:07 +0530 +Subject: bus: mhi: host: pci_generic: Add missing poweroff() PM callback + +From: Manivannan Sadhasivam + +commit e64d5fa5044f225ac87d96a7e4be11389999c4c6 upstream. + +During hibernation process, once thaw() stage completes, the MHI endpoint +devices will be in M0 state post recovery. After that, the devices will be +powered down so that the system can enter the target sleep state. During +this stage, the PCI core will put the devices in D3hot. But this transition +is allowed by the MHI spec. The devices can only enter D3hot when it is in +M3 state. + +So for fixing this issue, let's add the poweroff() callback that will get +executed before putting the system in target sleep state during +hibernation. This callback will power down the device properly so that it +could be restored during restore() or thaw() stage. + +Cc: stable@vger.kernel.org +Fixes: 5f0c2ee1fe8d ("bus: mhi: pci-generic: Fix hibernation") +Reported-by: Hemant Kumar +Suggested-by: Hemant Kumar +Link: https://lore.kernel.org/r/20220405125907.5644-1-manivannan.sadhasivam@linaro.org +Signed-off-by: Manivannan Sadhasivam +Signed-off-by: Greg Kroah-Hartman +--- + drivers/bus/mhi/pci_generic.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/bus/mhi/pci_generic.c ++++ b/drivers/bus/mhi/pci_generic.c +@@ -1085,6 +1085,7 @@ static const struct dev_pm_ops mhi_pci_p + .resume = mhi_pci_resume, + .freeze = mhi_pci_freeze, + .thaw = mhi_pci_restore, ++ .poweroff = mhi_pci_freeze, + .restore = mhi_pci_restore, + #endif + }; diff --git a/queue-5.17/bus-mhi-host-pci_generic-flush-recovery-worker-during-freeze.patch b/queue-5.17/bus-mhi-host-pci_generic-flush-recovery-worker-during-freeze.patch new file mode 100644 index 00000000000..eb482350da6 --- /dev/null +++ b/queue-5.17/bus-mhi-host-pci_generic-flush-recovery-worker-during-freeze.patch @@ -0,0 +1,37 @@ +From c38f83bae4037023827c85e045841d0421f85034 Mon Sep 17 00:00:00 2001 +From: Manivannan Sadhasivam +Date: Fri, 8 Apr 2022 20:30:39 +0530 +Subject: bus: mhi: host: pci_generic: Flush recovery worker during freeze + +From: Manivannan Sadhasivam + +commit c38f83bae4037023827c85e045841d0421f85034 upstream. + +It is possible that the recovery work might be running while the freeze +gets executed (during hibernation etc.,). Currently, we don't powerdown +the stack if it is not up but if the recovery work completes after freeze, +then the device will be up afterwards. This will not be a sane situation. + +So let's flush the recovery worker before trying to powerdown the device. + +Cc: stable@vger.kernel.org +Fixes: 5f0c2ee1fe8d ("bus: mhi: pci-generic: Fix hibernation") +Reported-by: Bhaumik Vasav Bhatt +Reviewed-by: Bhaumik Vasav Bhatt +Link: https://lore.kernel.org/r/20220408150039.17297-1-manivannan.sadhasivam@linaro.org +Signed-off-by: Manivannan Sadhasivam +Signed-off-by: Greg Kroah-Hartman +--- + drivers/bus/mhi/pci_generic.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/bus/mhi/pci_generic.c ++++ b/drivers/bus/mhi/pci_generic.c +@@ -1060,6 +1060,7 @@ static int __maybe_unused mhi_pci_freeze + * the intermediate restore kernel reinitializes MHI device with new + * context. + */ ++ flush_work(&mhi_pdev->recovery_work); + if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { + mhi_power_down(mhi_cntrl, true); + mhi_unprepare_after_power_down(mhi_cntrl); diff --git a/queue-5.17/f2fs-should-not-truncate-blocks-during-roll-forward-recovery.patch b/queue-5.17/f2fs-should-not-truncate-blocks-during-roll-forward-recovery.patch new file mode 100644 index 00000000000..cf93867e06b --- /dev/null +++ b/queue-5.17/f2fs-should-not-truncate-blocks-during-roll-forward-recovery.patch @@ -0,0 +1,37 @@ +From 4d8ec91208196e0e19195f1e7d6be9de5873f242 Mon Sep 17 00:00:00 2001 +From: Jaegeuk Kim +Date: Thu, 21 Apr 2022 16:47:02 -0700 +Subject: f2fs: should not truncate blocks during roll-forward recovery + +From: Jaegeuk Kim + +commit 4d8ec91208196e0e19195f1e7d6be9de5873f242 upstream. + +If the file preallocated blocks and fsync'ed, we should not truncate them during +roll-forward recovery which will recover i_size correctly back. + +Fixes: d4dd19ec1ea0 ("f2fs: do not expose unwritten blocks to user by DIO") +Cc: # 5.17+ +Signed-off-by: Jaegeuk Kim +Signed-off-by: Greg Kroah-Hartman +--- + fs/f2fs/inode.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/fs/f2fs/inode.c b/fs/f2fs/inode.c +index 71f232dcf3c2..83639238a1fe 100644 +--- a/fs/f2fs/inode.c ++++ b/fs/f2fs/inode.c +@@ -550,7 +550,8 @@ struct inode *f2fs_iget(struct super_block *sb, unsigned long ino) + } + f2fs_set_inode_flags(inode); + +- if (file_should_truncate(inode)) { ++ if (file_should_truncate(inode) && ++ !is_sbi_flag_set(sbi, SBI_POR_DOING)) { + ret = f2fs_truncate(inode); + if (ret) + goto bad_inode; +-- +2.36.0 + diff --git a/queue-5.17/hex2bin-fix-access-beyond-string-end.patch b/queue-5.17/hex2bin-fix-access-beyond-string-end.patch new file mode 100644 index 00000000000..4aef56380bb --- /dev/null +++ b/queue-5.17/hex2bin-fix-access-beyond-string-end.patch @@ -0,0 +1,48 @@ +From e4d8a29997731b3bb14059024b24df9f784288d0 Mon Sep 17 00:00:00 2001 +From: Mikulas Patocka +Date: Wed, 27 Apr 2022 11:26:40 -0400 +Subject: hex2bin: fix access beyond string end + +From: Mikulas Patocka + +commit e4d8a29997731b3bb14059024b24df9f784288d0 upstream. + +If we pass too short string to "hex2bin" (and the string size without +the terminating NUL character is even), "hex2bin" reads one byte after +the terminating NUL character. This patch fixes it. + +Note that hex_to_bin returns -1 on error and hex2bin return -EINVAL on +error - so we can't just return the variable "hi" or "lo" on error. +This inconsistency may be fixed in the next merge window, but for the +purpose of fixing this bug, we just preserve the existing behavior and +return -1 and -EINVAL. + +Signed-off-by: Mikulas Patocka +Reviewed-by: Andy Shevchenko +Fixes: b78049831ffe ("lib: add error checking to hex2bin") +Cc: stable@vger.kernel.org +Signed-off-by: Linus Torvalds +Signed-off-by: Greg Kroah-Hartman +--- + lib/hexdump.c | 9 ++++++--- + 1 file changed, 6 insertions(+), 3 deletions(-) + +--- a/lib/hexdump.c ++++ b/lib/hexdump.c +@@ -63,10 +63,13 @@ EXPORT_SYMBOL(hex_to_bin); + int hex2bin(u8 *dst, const char *src, size_t count) + { + while (count--) { +- int hi = hex_to_bin(*src++); +- int lo = hex_to_bin(*src++); ++ int hi, lo; + +- if ((hi < 0) || (lo < 0)) ++ hi = hex_to_bin(*src++); ++ if (unlikely(hi < 0)) ++ return -EINVAL; ++ lo = hex_to_bin(*src++); ++ if (unlikely(lo < 0)) + return -EINVAL; + + *dst++ = (hi << 4) | lo; diff --git a/queue-5.17/hex2bin-make-the-function-hex_to_bin-constant-time.patch b/queue-5.17/hex2bin-make-the-function-hex_to_bin-constant-time.patch new file mode 100644 index 00000000000..b25b72eee61 --- /dev/null +++ b/queue-5.17/hex2bin-make-the-function-hex_to_bin-constant-time.patch @@ -0,0 +1,91 @@ +From e5be15767e7e284351853cbaba80cde8620341fb Mon Sep 17 00:00:00 2001 +From: Mikulas Patocka +Date: Mon, 25 Apr 2022 08:07:48 -0400 +Subject: hex2bin: make the function hex_to_bin constant-time + +From: Mikulas Patocka + +commit e5be15767e7e284351853cbaba80cde8620341fb upstream. + +The function hex2bin is used to load cryptographic keys into device +mapper targets dm-crypt and dm-integrity. It should take constant time +independent on the processed data, so that concurrently running +unprivileged code can't infer any information about the keys via +microarchitectural convert channels. + +This patch changes the function hex_to_bin so that it contains no +branches and no memory accesses. + +Note that this shouldn't cause performance degradation because the size +of the new function is the same as the size of the old function (on +x86-64) - and the new function causes no branch misprediction penalties. + +I compile-tested this function with gcc on aarch64 alpha arm hppa hppa64 +i386 ia64 m68k mips32 mips64 powerpc powerpc64 riscv sh4 s390x sparc32 +sparc64 x86_64 and with clang on aarch64 arm hexagon i386 mips32 mips64 +powerpc powerpc64 s390x sparc32 sparc64 x86_64 to verify that there are +no branches in the generated code. + +Signed-off-by: Mikulas Patocka +Cc: stable@vger.kernel.org +Signed-off-by: Linus Torvalds +Signed-off-by: Greg Kroah-Hartman +--- + include/linux/kernel.h | 2 +- + lib/hexdump.c | 32 +++++++++++++++++++++++++------- + 2 files changed, 26 insertions(+), 8 deletions(-) + +--- a/include/linux/kernel.h ++++ b/include/linux/kernel.h +@@ -280,7 +280,7 @@ static inline char *hex_byte_pack_upper( + return buf; + } + +-extern int hex_to_bin(char ch); ++extern int hex_to_bin(unsigned char ch); + extern int __must_check hex2bin(u8 *dst, const char *src, size_t count); + extern char *bin2hex(char *dst, const void *src, size_t count); + +--- a/lib/hexdump.c ++++ b/lib/hexdump.c +@@ -22,15 +22,33 @@ EXPORT_SYMBOL(hex_asc_upper); + * + * hex_to_bin() converts one hex digit to its actual value or -1 in case of bad + * input. ++ * ++ * This function is used to load cryptographic keys, so it is coded in such a ++ * way that there are no conditions or memory accesses that depend on data. ++ * ++ * Explanation of the logic: ++ * (ch - '9' - 1) is negative if ch <= '9' ++ * ('0' - 1 - ch) is negative if ch >= '0' ++ * we "and" these two values, so the result is negative if ch is in the range ++ * '0' ... '9' ++ * we are only interested in the sign, so we do a shift ">> 8"; note that right ++ * shift of a negative value is implementation-defined, so we cast the ++ * value to (unsigned) before the shift --- we have 0xffffff if ch is in ++ * the range '0' ... '9', 0 otherwise ++ * we "and" this value with (ch - '0' + 1) --- we have a value 1 ... 10 if ch is ++ * in the range '0' ... '9', 0 otherwise ++ * we add this value to -1 --- we have a value 0 ... 9 if ch is in the range '0' ++ * ... '9', -1 otherwise ++ * the next line is similar to the previous one, but we need to decode both ++ * uppercase and lowercase letters, so we use (ch & 0xdf), which converts ++ * lowercase to uppercase + */ +-int hex_to_bin(char ch) ++int hex_to_bin(unsigned char ch) + { +- if ((ch >= '0') && (ch <= '9')) +- return ch - '0'; +- ch = tolower(ch); +- if ((ch >= 'a') && (ch <= 'f')) +- return ch - 'a' + 10; +- return -1; ++ unsigned char cu = ch & 0xdf; ++ return -1 + ++ ((ch - '0' + 1) & (unsigned)((ch - '9' - 1) & ('0' - 1 - ch)) >> 8) + ++ ((cu - 'A' + 11) & (unsigned)((cu - 'F' - 1) & ('A' - 1 - cu)) >> 8); + } + EXPORT_SYMBOL(hex_to_bin); + diff --git a/queue-5.17/pinctrl-samsung-fix-missing-gpiolib-on-arm64-exynos-config.patch b/queue-5.17/pinctrl-samsung-fix-missing-gpiolib-on-arm64-exynos-config.patch new file mode 100644 index 00000000000..52857efdd43 --- /dev/null +++ b/queue-5.17/pinctrl-samsung-fix-missing-gpiolib-on-arm64-exynos-config.patch @@ -0,0 +1,79 @@ +From ac875df4d854ab13d9c4af682a1837a1214fecec Mon Sep 17 00:00:00 2001 +From: Krzysztof Kozlowski +Date: Wed, 20 Apr 2022 16:14:07 +0200 +Subject: pinctrl: samsung: fix missing GPIOLIB on ARM64 Exynos config + +From: Krzysztof Kozlowski + +commit ac875df4d854ab13d9c4af682a1837a1214fecec upstream. + +The Samsung pinctrl drivers depend on OF_GPIO, which is part of GPIOLIB. +ARMv7 Exynos platform selects GPIOLIB and Samsung pinctrl drivers. ARMv8 +Exynos selects only the latter leading to possible wrong configuration +on ARMv8 build: + + WARNING: unmet direct dependencies detected for PINCTRL_EXYNOS + Depends on [n]: PINCTRL [=y] && OF_GPIO [=n] && (ARCH_EXYNOS [=y] || ARCH_S5PV210 || COMPILE_TEST [=y]) + Selected by [y]: + - ARCH_EXYNOS [=y] + +Always select the GPIOLIB from the Samsung pinctrl drivers to fix the +issue. This requires removing of OF_GPIO dependency (to avoid recursive +dependency), so add dependency on OF for COMPILE_TEST cases. + +Reported-by: Necip Fazil Yildiran +Fixes: eed6b3eb20b9 ("arm64: Split out platform options to separate Kconfig") +Cc: +Signed-off-by: Krzysztof Kozlowski +Reviewed-by: Arnd Bergmann +Link: https://lore.kernel.org/r/20220420141407.470955-1-krzysztof.kozlowski@linaro.org +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm/mach-exynos/Kconfig | 1 - + drivers/pinctrl/samsung/Kconfig | 11 ++++------- + 2 files changed, 4 insertions(+), 8 deletions(-) + +--- a/arch/arm/mach-exynos/Kconfig ++++ b/arch/arm/mach-exynos/Kconfig +@@ -17,7 +17,6 @@ menuconfig ARCH_EXYNOS + select EXYNOS_PMU + select EXYNOS_SROM + select EXYNOS_PM_DOMAINS if PM_GENERIC_DOMAINS +- select GPIOLIB + select HAVE_ARM_ARCH_TIMER if ARCH_EXYNOS5 + select HAVE_ARM_SCU if SMP + select PINCTRL +--- a/drivers/pinctrl/samsung/Kconfig ++++ b/drivers/pinctrl/samsung/Kconfig +@@ -4,14 +4,13 @@ + # + config PINCTRL_SAMSUNG + bool +- depends on OF_GPIO ++ select GPIOLIB + select PINMUX + select PINCONF + + config PINCTRL_EXYNOS + bool "Pinctrl common driver part for Samsung Exynos SoCs" +- depends on OF_GPIO +- depends on ARCH_EXYNOS || ARCH_S5PV210 || COMPILE_TEST ++ depends on ARCH_EXYNOS || ARCH_S5PV210 || (COMPILE_TEST && OF) + select PINCTRL_SAMSUNG + select PINCTRL_EXYNOS_ARM if ARM && (ARCH_EXYNOS || ARCH_S5PV210) + select PINCTRL_EXYNOS_ARM64 if ARM64 && ARCH_EXYNOS +@@ -26,12 +25,10 @@ config PINCTRL_EXYNOS_ARM64 + + config PINCTRL_S3C24XX + bool "Samsung S3C24XX SoC pinctrl driver" +- depends on OF_GPIO +- depends on ARCH_S3C24XX || COMPILE_TEST ++ depends on ARCH_S3C24XX || (COMPILE_TEST && OF) + select PINCTRL_SAMSUNG + + config PINCTRL_S3C64XX + bool "Samsung S3C64XX SoC pinctrl driver" +- depends on OF_GPIO +- depends on ARCH_S3C64XX || COMPILE_TEST ++ depends on ARCH_S3C64XX || (COMPILE_TEST && OF) + select PINCTRL_SAMSUNG diff --git a/queue-5.17/series b/queue-5.17/series index 37f14a257ae..72f12ac7dc4 100644 --- a/queue-5.17/series +++ b/queue-5.17/series @@ -39,3 +39,10 @@ eeprom-at25-use-dma-safe-buffers.patch arch_topology-do-not-set-llc_sibling-if-llc_id-is-invalid.patch topology-make-core_mask-include-at-least-cluster_siblings.patch ceph-fix-possible-null-pointer-dereference-for-req-r_session.patch +bus-mhi-host-pci_generic-add-missing-poweroff-pm-callback.patch +bus-mhi-host-pci_generic-flush-recovery-worker-during-freeze.patch +arm64-dts-imx8mm-venice-fix-spi2-pin-configuration.patch +pinctrl-samsung-fix-missing-gpiolib-on-arm64-exynos-config.patch +f2fs-should-not-truncate-blocks-during-roll-forward-recovery.patch +hex2bin-make-the-function-hex_to_bin-constant-time.patch +hex2bin-fix-access-beyond-string-end.patch