From: Jani Nikula Date: Mon, 27 May 2024 10:42:02 +0000 (+0300) Subject: drm/i915: pass dev_priv explicitly to PP_DIVISOR X-Git-Tag: v6.11-rc1~141^2~20^2~234 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=b758cd8057e9f982498efd73b3176987e996e5de;p=thirdparty%2Fkernel%2Flinux.git drm/i915: pass dev_priv explicitly to PP_DIVISOR Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the PP_DIVISOR register macro. Reviewed-by: Chaitanya Kumar Borah Link: https://patchwork.freedesktop.org/patch/msgid/28e9f7e3570c15ac5c229048ec0def2e4a667ffc.1716806471.git.jani.nikula@intel.com Signed-off-by: Jani Nikula --- diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c index 3adfe93794ef4..891777481dd90 100644 --- a/drivers/gpu/drm/i915/display/intel_lvds.c +++ b/drivers/gpu/drm/i915/display/intel_lvds.c @@ -173,7 +173,7 @@ static void intel_lvds_pps_get_hw_state(struct drm_i915_private *dev_priv, pps->t3 = REG_FIELD_GET(PANEL_POWER_DOWN_DELAY_MASK, val); pps->tx = REG_FIELD_GET(PANEL_LIGHT_OFF_DELAY_MASK, val); - val = intel_de_read(dev_priv, PP_DIVISOR(0)); + val = intel_de_read(dev_priv, PP_DIVISOR(dev_priv, 0)); pps->divider = REG_FIELD_GET(PP_REFERENCE_DIVIDER_MASK, val); val = REG_FIELD_GET(PANEL_POWER_CYCLE_DELAY_MASK, val); /* @@ -226,7 +226,7 @@ static void intel_lvds_pps_init_hw(struct drm_i915_private *dev_priv, REG_FIELD_PREP(PANEL_POWER_DOWN_DELAY_MASK, pps->t3) | REG_FIELD_PREP(PANEL_LIGHT_OFF_DELAY_MASK, pps->tx)); - intel_de_write(dev_priv, PP_DIVISOR(0), + intel_de_write(dev_priv, PP_DIVISOR(dev_priv, 0), REG_FIELD_PREP(PP_REFERENCE_DIVIDER_MASK, pps->divider) | REG_FIELD_PREP(PANEL_POWER_CYCLE_DELAY_MASK, DIV_ROUND_UP(pps->t4, 1000) + 1)); } diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c index 2cc6d5f209e64..73046ef58d8e3 100644 --- a/drivers/gpu/drm/i915/display/intel_pps.c +++ b/drivers/gpu/drm/i915/display/intel_pps.c @@ -501,7 +501,7 @@ static void intel_pps_get_registers(struct intel_dp *intel_dp, INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) regs->pp_div = INVALID_MMIO_REG; else - regs->pp_div = PP_DIVISOR(pps_idx); + regs->pp_div = PP_DIVISOR(dev_priv, pps_idx); } static i915_reg_t diff --git a/drivers/gpu/drm/i915/display/intel_pps_regs.h b/drivers/gpu/drm/i915/display/intel_pps_regs.h index b1ccc54410cea..8f9dbfab95233 100644 --- a/drivers/gpu/drm/i915/display/intel_pps_regs.h +++ b/drivers/gpu/drm/i915/display/intel_pps_regs.h @@ -71,7 +71,7 @@ #define PANEL_LIGHT_OFF_DELAY_MASK REG_GENMASK(12, 0) #define _PP_DIVISOR 0x61210 -#define PP_DIVISOR(pps_idx) _MMIO_PPS(dev_priv, pps_idx, _PP_DIVISOR) +#define PP_DIVISOR(dev_priv, pps_idx) _MMIO_PPS(dev_priv, pps_idx, _PP_DIVISOR) #define PP_REFERENCE_DIVIDER_MASK REG_GENMASK(31, 8) #define PANEL_POWER_CYCLE_DELAY_MASK REG_GENMASK(4, 0)