From: Jaydeep Patil Date: Thu, 11 Jan 2024 05:28:21 +0000 (+0000) Subject: sim: riscv: Fix crash during instruction decoding X-Git-Tag: gdb-15-branchpoint~1169 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=b783d068d969b5422ce60ecc6968a1a35ee92a7e;p=thirdparty%2Fbinutils-gdb.git sim: riscv: Fix crash during instruction decoding The match_never() function has been removed and thus step_once() crashes during instruction decoding. Fixed it by checking for null pointer before invoking function attached to match_func member of riscv_opcode structure --- diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c index 52dca4ad282..0b05f1ce861 100644 --- a/sim/riscv/sim-main.c +++ b/sim/riscv/sim-main.c @@ -1040,7 +1040,7 @@ void step_once (SIM_CPU *cpu) for (; op->name; op++) { /* Does the opcode match? */ - if (! op->match_func (op, iw)) + if (! op->match_func || ! op->match_func (op, iw)) continue; /* Is this a pseudo-instruction and may we print it as such? */ if (op->pinfo & INSN_ALIAS)