From: Matthew Wahab Date: Tue, 2 Jun 2015 11:24:24 +0000 (+0100) Subject: [ARM] Rework CPU feature selection in the disassembler X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=b841cad7d858517f4f05919a6ba60ccb8f72379c;p=thirdparty%2Fbinutils-gdb.git [ARM] Rework CPU feature selection in the disassembler include/opcode/ * arm.h (ARM_FEATURE_ALL): New. opcodes/ * arm-dis.c (select_arm_features): Rework to avoid used of redefined macros. Change-Id: I55383e81473254b8dd31251634f7bd5af87d8a9d --- diff --git a/include/opcode/arm.h b/include/opcode/arm.h index 0847d12e3e3..148a0d8420c 100644 --- a/include/opcode/arm.h +++ b/include/opcode/arm.h @@ -241,6 +241,7 @@ #define ARM_ARCH_NONE ARM_FEATURE_LOW (0, 0) #define FPU_NONE ARM_FEATURE_LOW (0, 0) #define ARM_ANY ARM_FEATURE (-1, -1, 0) /* Any basic core. */ +#define ARM_FEATURE_ALL ARM_FEATURE (-1, -1, -1)/* All CPU and FPU features. */ #define FPU_ANY_HARD ARM_FEATURE_COPROC (FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK) #define ARM_ARCH_THUMB2 ARM_FEATURE_CORE_LOW (ARM_EXT_V6T2 | ARM_EXT_V7 \ | ARM_EXT_V7A | ARM_EXT_V7R \ diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 71f17f1f11b..a678d488f36 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -11,6 +11,11 @@ (print_insn_arm): Likewise. (select_arm_features): Follow new feature struct. +2015-06-02 Matthew Wahab + + * arm-dis.c (select_arm_features): Rework to avoid used of redefined + macros. + 2015-06-02 Matthew Wahab * aarch64-tbl.h (aarch64_feature_rdma): New. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 9d1ee872262..619e11c1fd3 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -6017,43 +6017,40 @@ static void select_arm_features (unsigned long mach, arm_feature_set * features) { -#undef ARM_FEATURE_LOW -#define ARM_FEATURE_LOW(ARCH1,CEXT) \ - features->core[0] = (ARCH1); \ - features->core[1] = 0; \ - features->coproc = (CEXT) | FPU_FPA; \ - return - -#undef ARM_FEATURE_CORE_LOW -#define ARM_FEATURE_CORE_LOW(ARCH1) \ - features->core[0] = (ARCH1); \ - features->core[1] = 0; \ - features->coproc = FPU_FPA; \ - return +#undef ARM_SET_FEATURES +#define ARM_SET_FEATURES(FSET) \ + { \ + const arm_feature_set fset = FSET; \ + arm_feature_set tmp = ARM_FEATURE (0, 0, FPU_FPA) ; \ + ARM_MERGE_FEATURE_SETS (*features, tmp, fset); \ + } switch (mach) { - case bfd_mach_arm_2: ARM_ARCH_V2; - case bfd_mach_arm_2a: ARM_ARCH_V2S; - case bfd_mach_arm_3: ARM_ARCH_V3; - case bfd_mach_arm_3M: ARM_ARCH_V3M; - case bfd_mach_arm_4: ARM_ARCH_V4; - case bfd_mach_arm_4T: ARM_ARCH_V4T; - case bfd_mach_arm_5: ARM_ARCH_V5; - case bfd_mach_arm_5T: ARM_ARCH_V5T; - case bfd_mach_arm_5TE: ARM_ARCH_V5TE; - case bfd_mach_arm_XScale: ARM_ARCH_XSCALE; - case bfd_mach_arm_ep9312: ARM_FEATURE_LOW (ARM_AEXT_V4T, \ - ARM_CEXT_MAVERICK \ - | FPU_MAVERICK); - case bfd_mach_arm_iWMMXt: ARM_ARCH_IWMMXT; - case bfd_mach_arm_iWMMXt2: ARM_ARCH_IWMMXT2; + case bfd_mach_arm_2: ARM_SET_FEATURES (ARM_ARCH_V2); break; + case bfd_mach_arm_2a: ARM_SET_FEATURES (ARM_ARCH_V2S); break; + case bfd_mach_arm_3: ARM_SET_FEATURES (ARM_ARCH_V3); break; + case bfd_mach_arm_3M: ARM_SET_FEATURES (ARM_ARCH_V3M); break; + case bfd_mach_arm_4: ARM_SET_FEATURES (ARM_ARCH_V4); break; + case bfd_mach_arm_4T: ARM_SET_FEATURES (ARM_ARCH_V4T); break; + case bfd_mach_arm_5: ARM_SET_FEATURES (ARM_ARCH_V5); break; + case bfd_mach_arm_5T: ARM_SET_FEATURES (ARM_ARCH_V5T); break; + case bfd_mach_arm_5TE: ARM_SET_FEATURES (ARM_ARCH_V5TE); break; + case bfd_mach_arm_XScale: ARM_SET_FEATURES (ARM_ARCH_XSCALE); break; + case bfd_mach_arm_ep9312: + ARM_SET_FEATURES (ARM_FEATURE_LOW (ARM_AEXT_V4T, + ARM_CEXT_MAVERICK | FPU_MAVERICK)); + break; + case bfd_mach_arm_iWMMXt: ARM_SET_FEATURES (ARM_ARCH_IWMMXT); break; + case bfd_mach_arm_iWMMXt2: ARM_SET_FEATURES (ARM_ARCH_IWMMXT2); break; /* If the machine type is unknown allow all architecture types and all extensions. */ - case bfd_mach_arm_unknown: ARM_FEATURE_LOW (-1UL, -1UL); + case bfd_mach_arm_unknown: ARM_SET_FEATURES (ARM_FEATURE_ALL); break; default: abort (); } + +#undef ARM_SET_FEATURES }