From: Greg Kroah-Hartman Date: Sat, 3 Apr 2021 09:30:27 +0000 (+0200) Subject: 5.10-stable patches X-Git-Tag: v4.4.265~39 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=b975a5a176fa3fec57119e29f1b5ab184edceee1;p=thirdparty%2Fkernel%2Fstable-queue.git 5.10-stable patches added patches: drm-imx-fix-memory-leak-when-fails-to-init.patch drm-tegra-dc-restore-coupling-of-display-controllers.patch drm-tegra-sor-grab-runtime-pm-reference-across-reset.patch pinctrl-rockchip-fix-restore-error-in-resume.patch vfio-nvlink-add-missing-spapr_tce_iommu-depends.patch --- diff --git a/queue-5.10/drm-imx-fix-memory-leak-when-fails-to-init.patch b/queue-5.10/drm-imx-fix-memory-leak-when-fails-to-init.patch new file mode 100644 index 00000000000..2334d65652b --- /dev/null +++ b/queue-5.10/drm-imx-fix-memory-leak-when-fails-to-init.patch @@ -0,0 +1,36 @@ +From 69c3ed7282a143439bbc2d03dc00d49c68fcb629 Mon Sep 17 00:00:00 2001 +From: Pan Bian +Date: Wed, 20 Jan 2021 01:16:08 -0800 +Subject: drm/imx: fix memory leak when fails to init + +From: Pan Bian + +commit 69c3ed7282a143439bbc2d03dc00d49c68fcb629 upstream. + +Put DRM device on initialization failure path rather than directly +return error code. + +Fixes: a67d5088ceb8 ("drm/imx: drop explicit drm_mode_config_cleanup") +Signed-off-by: Pan Bian +Signed-off-by: Philipp Zabel +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/imx/imx-drm-core.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/imx/imx-drm-core.c b/drivers/gpu/drm/imx/imx-drm-core.c +index d1a9841adeed..e6a88c8cbd69 100644 +--- a/drivers/gpu/drm/imx/imx-drm-core.c ++++ b/drivers/gpu/drm/imx/imx-drm-core.c +@@ -215,7 +215,7 @@ static int imx_drm_bind(struct device *dev) + + ret = drmm_mode_config_init(drm); + if (ret) +- return ret; ++ goto err_kms; + + ret = drm_vblank_init(drm, MAX_CRTC); + if (ret) +-- +2.31.1 + diff --git a/queue-5.10/drm-tegra-dc-restore-coupling-of-display-controllers.patch b/queue-5.10/drm-tegra-dc-restore-coupling-of-display-controllers.patch new file mode 100644 index 00000000000..d1d668f3403 --- /dev/null +++ b/queue-5.10/drm-tegra-dc-restore-coupling-of-display-controllers.patch @@ -0,0 +1,61 @@ +From a31500fe7055451ed9043c8fff938dfa6f70ee37 Mon Sep 17 00:00:00 2001 +From: Thierry Reding +Date: Fri, 19 Mar 2021 08:06:37 +0100 +Subject: drm/tegra: dc: Restore coupling of display controllers + +From: Thierry Reding + +commit a31500fe7055451ed9043c8fff938dfa6f70ee37 upstream. + +Coupling of display controllers used to rely on runtime PM to take the +companion controller out of reset. Commit fd67e9c6ed5a ("drm/tegra: Do +not implement runtime PM") accidentally broke this when runtime PM was +removed. + +Restore this functionality by reusing the hierarchical host1x client +suspend/resume infrastructure that's similar to runtime PM and which +perfectly fits this use-case. + +Fixes: fd67e9c6ed5a ("drm/tegra: Do not implement runtime PM") +Reported-by: Dmitry Osipenko +Reported-by: Paul Fertser +Tested-by: Dmitry Osipenko +Signed-off-by: Thierry Reding +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/tegra/dc.c | 20 ++++++++------------ + 1 file changed, 8 insertions(+), 12 deletions(-) + +--- a/drivers/gpu/drm/tegra/dc.c ++++ b/drivers/gpu/drm/tegra/dc.c +@@ -2499,22 +2499,18 @@ static int tegra_dc_couple(struct tegra_ + * POWER_CONTROL registers during CRTC enabling. + */ + if (dc->soc->coupled_pm && dc->pipe == 1) { +- u32 flags = DL_FLAG_PM_RUNTIME | DL_FLAG_AUTOREMOVE_CONSUMER; +- struct device_link *link; +- struct device *partner; ++ struct device *companion; ++ struct tegra_dc *parent; + +- partner = driver_find_device(dc->dev->driver, NULL, NULL, +- tegra_dc_match_by_pipe); +- if (!partner) ++ companion = driver_find_device(dc->dev->driver, NULL, (const void *)0, ++ tegra_dc_match_by_pipe); ++ if (!companion) + return -EPROBE_DEFER; + +- link = device_link_add(dc->dev, partner, flags); +- if (!link) { +- dev_err(dc->dev, "failed to link controllers\n"); +- return -EINVAL; +- } ++ parent = dev_get_drvdata(companion); ++ dc->client.parent = &parent->client; + +- dev_dbg(dc->dev, "coupled to %s\n", dev_name(partner)); ++ dev_dbg(dc->dev, "coupled to %s\n", dev_name(companion)); + } + + return 0; diff --git a/queue-5.10/drm-tegra-sor-grab-runtime-pm-reference-across-reset.patch b/queue-5.10/drm-tegra-sor-grab-runtime-pm-reference-across-reset.patch new file mode 100644 index 00000000000..0d6dbe56aa1 --- /dev/null +++ b/queue-5.10/drm-tegra-sor-grab-runtime-pm-reference-across-reset.patch @@ -0,0 +1,57 @@ +From ac097aecfef0bb289ca53d2fe0b73fc7e1612a05 Mon Sep 17 00:00:00 2001 +From: Thierry Reding +Date: Fri, 19 Mar 2021 14:17:22 +0100 +Subject: drm/tegra: sor: Grab runtime PM reference across reset + +From: Thierry Reding + +commit ac097aecfef0bb289ca53d2fe0b73fc7e1612a05 upstream. + +The SOR resets are exclusively shared with the SOR power domain. This +means that exclusive access can only be granted temporarily and in order +for that to work, a rigorous sequence must be observed. To ensure that a +single consumer gets exclusive access to a reset, each consumer must +implement a rigorous protocol using the reset_control_acquire() and +reset_control_release() functions. + +However, these functions alone don't provide any guarantees at the +system level. Drivers need to ensure that the only a single consumer has +access to the reset at the same time. In order for the SOR to be able to +exclusively access its reset, it must therefore ensure that the SOR +power domain is not powered off by holding on to a runtime PM reference +to that power domain across the reset assert/deassert operation. + +This used to work fine by accident, but was revealed when recently more +devices started to rely on the SOR power domain. + +Fixes: 11c632e1cfd3 ("drm/tegra: sor: Implement acquire/release for reset") +Reported-by: Jonathan Hunter +Signed-off-by: Thierry Reding +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/tegra/sor.c | 7 +++++++ + 1 file changed, 7 insertions(+) + +--- a/drivers/gpu/drm/tegra/sor.c ++++ b/drivers/gpu/drm/tegra/sor.c +@@ -3115,6 +3115,12 @@ static int tegra_sor_init(struct host1x_ + * kernel is possible. + */ + if (sor->rst) { ++ err = pm_runtime_resume_and_get(sor->dev); ++ if (err < 0) { ++ dev_err(sor->dev, "failed to get runtime PM: %d\n", err); ++ return err; ++ } ++ + err = reset_control_acquire(sor->rst); + if (err < 0) { + dev_err(sor->dev, "failed to acquire SOR reset: %d\n", +@@ -3148,6 +3154,7 @@ static int tegra_sor_init(struct host1x_ + } + + reset_control_release(sor->rst); ++ pm_runtime_put(sor->dev); + } + + err = clk_prepare_enable(sor->clk_safe); diff --git a/queue-5.10/pinctrl-rockchip-fix-restore-error-in-resume.patch b/queue-5.10/pinctrl-rockchip-fix-restore-error-in-resume.patch new file mode 100644 index 00000000000..48969798c95 --- /dev/null +++ b/queue-5.10/pinctrl-rockchip-fix-restore-error-in-resume.patch @@ -0,0 +1,47 @@ +From c971af25cda94afe71617790826a86253e88eab0 Mon Sep 17 00:00:00 2001 +From: Wang Panzhenzhuan +Date: Tue, 23 Feb 2021 18:07:25 +0800 +Subject: pinctrl: rockchip: fix restore error in resume + +From: Wang Panzhenzhuan + +commit c971af25cda94afe71617790826a86253e88eab0 upstream. + +The restore in resume should match to suspend which only set for RK3288 +SoCs pinctrl. + +Fixes: 8dca933127024 ("pinctrl: rockchip: save and restore gpio6_c6 pinmux in suspend/resume") +Reviewed-by: Jianqun Xu +Reviewed-by: Heiko Stuebner +Signed-off-by: Wang Panzhenzhuan +Signed-off-by: Jianqun Xu +Link: https://lore.kernel.org/r/20210223100725.269240-1-jay.xu@rock-chips.com +Signed-off-by: Linus Walleij +Signed-off-by: Greg Kroah-Hartman +--- + drivers/pinctrl/pinctrl-rockchip.c | 13 ++++++++----- + 1 file changed, 8 insertions(+), 5 deletions(-) + +--- a/drivers/pinctrl/pinctrl-rockchip.c ++++ b/drivers/pinctrl/pinctrl-rockchip.c +@@ -3727,12 +3727,15 @@ static int __maybe_unused rockchip_pinct + static int __maybe_unused rockchip_pinctrl_resume(struct device *dev) + { + struct rockchip_pinctrl *info = dev_get_drvdata(dev); +- int ret = regmap_write(info->regmap_base, RK3288_GRF_GPIO6C_IOMUX, +- rk3288_grf_gpio6c_iomux | +- GPIO6C6_SEL_WRITE_ENABLE); ++ int ret; + +- if (ret) +- return ret; ++ if (info->ctrl->type == RK3288) { ++ ret = regmap_write(info->regmap_base, RK3288_GRF_GPIO6C_IOMUX, ++ rk3288_grf_gpio6c_iomux | ++ GPIO6C6_SEL_WRITE_ENABLE); ++ if (ret) ++ return ret; ++ } + + return pinctrl_force_default(info->pctl_dev); + } diff --git a/queue-5.10/series b/queue-5.10/series index 90f8001f36b..3137260c52a 100644 --- a/queue-5.10/series +++ b/queue-5.10/series @@ -74,3 +74,8 @@ drm-amdkfd-dqm-fence-memory-corruption.patch drm-amdgpu-fix-offset-calculation-in-amdgpu_vm_bo_clear_mappings.patch drm-amdgpu-check-alignment-on-cpu-page-for-bo-map.patch reiserfs-update-reiserfs_xattrs_initialized-condition.patch +drm-imx-fix-memory-leak-when-fails-to-init.patch +drm-tegra-dc-restore-coupling-of-display-controllers.patch +drm-tegra-sor-grab-runtime-pm-reference-across-reset.patch +vfio-nvlink-add-missing-spapr_tce_iommu-depends.patch +pinctrl-rockchip-fix-restore-error-in-resume.patch diff --git a/queue-5.10/vfio-nvlink-add-missing-spapr_tce_iommu-depends.patch b/queue-5.10/vfio-nvlink-add-missing-spapr_tce_iommu-depends.patch new file mode 100644 index 00000000000..08e6aab99d5 --- /dev/null +++ b/queue-5.10/vfio-nvlink-add-missing-spapr_tce_iommu-depends.patch @@ -0,0 +1,41 @@ +From e0146a108ce4d2c22b9510fd12268e3ee72a0161 Mon Sep 17 00:00:00 2001 +From: Jason Gunthorpe +Date: Mon, 29 Mar 2021 16:00:16 -0300 +Subject: vfio/nvlink: Add missing SPAPR_TCE_IOMMU depends + +From: Jason Gunthorpe + +commit e0146a108ce4d2c22b9510fd12268e3ee72a0161 upstream. + +Compiling the nvlink stuff relies on the SPAPR_TCE_IOMMU otherwise there +are compile errors: + + drivers/vfio/pci/vfio_pci_nvlink2.c:101:10: error: implicit declaration of function 'mm_iommu_put' [-Werror,-Wimplicit-function-declaration] + ret = mm_iommu_put(data->mm, data->mem); + +As PPC only defines these functions when the config is set. + +Previously this wasn't a problem by chance as SPAPR_TCE_IOMMU was the only +IOMMU that could have satisfied IOMMU_API on POWERNV. + +Fixes: 179209fa1270 ("vfio: IOMMU_API should be selected") +Reported-by: kernel test robot +Signed-off-by: Jason Gunthorpe +Message-Id: <0-v1-83dba9768fc3+419-vfio_nvlink2_kconfig_jgg@nvidia.com> +Signed-off-by: Alex Williamson +Signed-off-by: Greg Kroah-Hartman +--- + drivers/vfio/pci/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/vfio/pci/Kconfig ++++ b/drivers/vfio/pci/Kconfig +@@ -42,7 +42,7 @@ config VFIO_PCI_IGD + + config VFIO_PCI_NVLINK2 + def_bool y +- depends on VFIO_PCI && PPC_POWERNV ++ depends on VFIO_PCI && PPC_POWERNV && SPAPR_TCE_IOMMU + help + VFIO PCI support for P9 Witherspoon machine with NVIDIA V100 GPUs +