From: Julian Seward Date: Wed, 10 Aug 2005 11:43:42 +0000 (+0000) Subject: Implement DC /3 (FCOMP double-real). X-Git-Tag: svn/VALGRIND_3_1_1^2~147 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=b9a5a0db2e9f2394739b7a7b546abcf0d301f325;p=thirdparty%2Fvalgrind.git Implement DC /3 (FCOMP double-real). git-svn-id: svn://svn.valgrind.org/vex/trunk@1323 --- diff --git a/VEX/priv/guest-amd64/toIR.c b/VEX/priv/guest-amd64/toIR.c index e27e2b81ec..5899a19184 100644 --- a/VEX/priv/guest-amd64/toIR.c +++ b/VEX/priv/guest-amd64/toIR.c @@ -5150,21 +5150,22 @@ ULong dis_FPU ( /*OUT*/Bool* decode_ok, //.. mkU32(0x4500) //.. )); //.. break; -//.. -//.. case 3: /* FCOMP double-real */ -//.. DIP("fcompl %s\n", dis_buf); -//.. /* This forces C1 to zero, which isn't right. */ -//.. put_C3210( -//.. binop( Iop_And32, -//.. binop(Iop_Shl32, -//.. binop(Iop_CmpF64, -//.. get_ST(0), -//.. loadLE(Ity_F64,mkexpr(addr))), -//.. mkU8(8)), -//.. mkU32(0x4500) -//.. )); -//.. fp_pop(); -//.. break; + + case 3: /* FCOMP double-real */ + DIP("fcompl %s\n", dis_buf); + /* This forces C1 to zero, which isn't right. */ + put_C3210( + unop(Iop_32Uto64, + binop( Iop_And32, + binop(Iop_Shl32, + binop(Iop_CmpF64, + get_ST(0), + loadLE(Ity_F64,mkexpr(addr))), + mkU8(8)), + mkU32(0x4500) + ))); + fp_pop(); + break; case 4: /* FSUB double-real */ fp_do_op_mem_ST_0 ( addr, "sub", dis_buf, Iop_SubF64, True );