From: Ahmad Fatoum Date: Fri, 28 Aug 2020 13:00:02 +0000 (+0200) Subject: ARM: dts: stm32: lxa-mc1: enable DDR50 mode on eMMC X-Git-Tag: v5.10-rc1~26^2~24^2~2 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=bae2b7f6774b2db44f9001bee7465d4dadd1ede8;p=thirdparty%2Flinux.git ARM: dts: stm32: lxa-mc1: enable DDR50 mode on eMMC The "eMMC high-speed DDR mode (3.3V I/O)" at 50MHz is supported on the eMMC-interface of the lxa-mc1. Set it in the device tree to benefit from the speed improvement. Signed-off-by: Ahmad Fatoum Signed-off-by: Holger Assmann Signed-off-by: Alexandre Torgue --- diff --git a/arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts b/arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts index b85025d009437..1e5333fd437fe 100644 --- a/arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts +++ b/arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts @@ -212,6 +212,7 @@ pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_b>; pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_b>; bus-width = <8>; + mmc-ddr-3_3v; no-1-8-v; no-sd; no-sdio;