From: Jan Beulich Date: Fri, 15 Aug 2025 10:21:42 +0000 (+0200) Subject: x86/APX: drop AMX-TRANSPOSE promoted insns X-Git-Tag: gdb-17-branchpoint~300 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=bafcf0823c1ae4c2201670225c9cf14ccf2abc67;p=thirdparty%2Fbinutils-gdb.git x86/APX: drop AMX-TRANSPOSE promoted insns They were dropped from spec version 007. --- diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 11f409526e3..f7318694108 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -2303,8 +2303,7 @@ cpu_flags_match (const insn_template *t) || any.bitfield.cpuavx512f || any.bitfield.cpuavx512bw || any.bitfield.cpuavx512dq || any.bitfield.cpuamx_tile || any.bitfield.cpucmpccxadd || any.bitfield.cpuuser_msr - || any.bitfield.cpumsr_imm || any.bitfield.cpuamx_transpose - || any.bitfield.cpuamx_movrs)) + || any.bitfield.cpumsr_imm || any.bitfield.cpuamx_movrs)) { /* These checks (verifying that APX_F() was properly used in the opcode table entry) make sure there's no need for an "else" to @@ -4179,8 +4178,7 @@ install_template (const insn_template *t) || maybe_cpu (t, CpuAVX512F) || maybe_cpu (t, CpuAVX512DQ) || maybe_cpu (t, CpuAVX512BW) || maybe_cpu (t, CpuBMI) || maybe_cpu (t, CpuBMI2) || maybe_cpu (t, CpuUSER_MSR) - || maybe_cpu (t, CpuMSR_IMM) || maybe_cpu (t, CpuAMX_TRANSPOSE) - || maybe_cpu (t, CpuAMX_MOVRS)) + || maybe_cpu (t, CpuMSR_IMM) || maybe_cpu (t, CpuAMX_MOVRS)) && maybe_cpu (t, CpuAPX_F)) { if (need_evex_encoding (t)) diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d index d5476d3dff3..68c73e9385c 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d @@ -139,14 +139,6 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 52 87 00 f7 df[ ]+shrx[ ]+r11,r15,r31 [ ]*[a-f0-9]+:[ ]*62 5a 87 00 f7 bc 87 23 01 00 00[ ]+shrx[ ]+r15,QWORD PTR \[r31\+rax\*4\+0x123\],r31 [ ]*[a-f0-9]+:[ ]*62 da 7d 08 49 84 87 23 01 00 00[ ]+sttilecfg[ ]+\[r31\+rax\*4\+0x123\] -[ ]*[a-f0-9]+:[ ]*62 da 7c 08 6e b4 c7 23 01 00 00[ ]+t2rpntlvwz0 tmm6,\[r31\+rax\*8\+0x123\] -[ ]*[a-f0-9]+:[ ]*62 dd 7c 08 f8 b4 c7 23 01 00 00[ ]+t2rpntlvwz0rs tmm6,\[r31\+rax\*8\+0x123\] -[ ]*[a-f0-9]+:[ ]*62 dd 7c 08 f9 b4 c7 23 01 00 00[ ]+t2rpntlvwz0rst1 tmm6,\[r31\+rax\*8\+0x123\] -[ ]*[a-f0-9]+:[ ]*62 da 7c 08 6f b4 c7 23 01 00 00[ ]+t2rpntlvwz0t1 tmm6,\[r31\+rax\*8\+0x123\] -[ ]*[a-f0-9]+:[ ]*62 da 7d 08 6e b4 c7 23 01 00 00[ ]+t2rpntlvwz1 tmm6,\[r31\+rax\*8\+0x123\] -[ ]*[a-f0-9]+:[ ]*62 dd 7d 08 f8 b4 c7 23 01 00 00[ ]+t2rpntlvwz1rs tmm6,\[r31\+rax\*8\+0x123\] -[ ]*[a-f0-9]+:[ ]*62 dd 7d 08 f9 b4 c7 23 01 00 00[ ]+t2rpntlvwz1rst1 tmm6,\[r31\+rax\*8\+0x123\] -[ ]*[a-f0-9]+:[ ]*62 da 7d 08 6f b4 c7 23 01 00 00[ ]+t2rpntlvwz1t1 tmm6,\[r31\+rax\*8\+0x123\] [ ]*[a-f0-9]+:[ ]*62 da 7f 08 4b b4 87 23 01 00 00[ ]+tileloadd tmm6,\[r31\+rax\*4\+0x123\] [ ]*[a-f0-9]+:[ ]*62 b2 7b 08 4a b4 fd 00 00 00 10[ ]+tileloaddrs[ ]+tmm6,\[rbp\+r31\*8\+0x10000000\] [ ]*[a-f0-9]+:[ ]*62 fa 7f 08 4a 1c 20[ ]+tileloaddrs[ ]+tmm3,\[r16\+riz\*1\] @@ -286,14 +278,6 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 52 87 00 f7 df[ ]+shrx[ ]+r11,r15,r31 [ ]*[a-f0-9]+:[ ]*62 5a 87 00 f7 bc 87 23 01 00 00[ ]+shrx[ ]+r15,QWORD PTR \[r31\+rax\*4\+0x123\],r31 [ ]*[a-f0-9]+:[ ]*62 da 7d 08 49 84 87 23 01 00 00[ ]+sttilecfg[ ]+\[r31\+rax\*4\+0x123\] -[ ]*[a-f0-9]+:[ ]*62 da 7c 08 6e b4 c7 23 01 00 00[ ]+t2rpntlvwz0 tmm6,\[r31\+rax\*8\+0x123\] -[ ]*[a-f0-9]+:[ ]*62 dd 7c 08 f8 b4 c7 23 01 00 00[ ]+t2rpntlvwz0rs tmm6,\[r31\+rax\*8\+0x123\] -[ ]*[a-f0-9]+:[ ]*62 dd 7c 08 f9 b4 c7 23 01 00 00[ ]+t2rpntlvwz0rst1 tmm6,\[r31\+rax\*8\+0x123\] -[ ]*[a-f0-9]+:[ ]*62 da 7c 08 6f b4 c7 23 01 00 00[ ]+t2rpntlvwz0t1 tmm6,\[r31\+rax\*8\+0x123\] -[ ]*[a-f0-9]+:[ ]*62 da 7d 08 6e b4 c7 23 01 00 00[ ]+t2rpntlvwz1 tmm6,\[r31\+rax\*8\+0x123\] -[ ]*[a-f0-9]+:[ ]*62 dd 7d 08 f8 b4 c7 23 01 00 00[ ]+t2rpntlvwz1rs tmm6,\[r31\+rax\*8\+0x123\] -[ ]*[a-f0-9]+:[ ]*62 dd 7d 08 f9 b4 c7 23 01 00 00[ ]+t2rpntlvwz1rst1 tmm6,\[r31\+rax\*8\+0x123\] -[ ]*[a-f0-9]+:[ ]*62 da 7d 08 6f b4 c7 23 01 00 00[ ]+t2rpntlvwz1t1 tmm6,\[r31\+rax\*8\+0x123\] [ ]*[a-f0-9]+:[ ]*62 da 7f 08 4b b4 87 23 01 00 00[ ]+tileloadd tmm6,\[r31\+rax\*4\+0x123\] [ ]*[a-f0-9]+:[ ]*62 b2 7b 08 4a b4 fd 00 00 00 10[ ]+tileloaddrs[ ]+tmm6,\[rbp\+r31\*8\+0x10000000\] [ ]*[a-f0-9]+:[ ]*62 fa 7f 08 4a 1c 20[ ]+tileloaddrs[ ]+tmm3,\[r16\+riz\*1\] diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d index c445a44df97..3ced6d5d90c 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d @@ -139,14 +139,6 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 52 87 00 f7 df[ ]+shrx[ ]+%r31,%r15,%r11 [ ]*[a-f0-9]+:[ ]*62 5a 87 00 f7 bc 87 23 01 00 00[ ]+shrx[ ]+%r31,0x123\(%r31,%rax,4\),%r15 [ ]*[a-f0-9]+:[ ]*62 da 7d 08 49 84 87 23 01 00 00[ ]+sttilecfg[ ]+0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 7c 08 6e b4 c7 23 01 00 00[ ]+t2rpntlvwz0[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 dd 7c 08 f8 b4 c7 23 01 00 00[ ]+t2rpntlvwz0rs[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 dd 7c 08 f9 b4 c7 23 01 00 00[ ]+t2rpntlvwz0rst1[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 da 7c 08 6f b4 c7 23 01 00 00[ ]+t2rpntlvwz0t1[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 da 7d 08 6e b4 c7 23 01 00 00[ ]+t2rpntlvwz1[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 dd 7d 08 f8 b4 c7 23 01 00 00[ ]+t2rpntlvwz1rs[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 dd 7d 08 f9 b4 c7 23 01 00 00[ ]+t2rpntlvwz1rst1[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 da 7d 08 6f b4 c7 23 01 00 00[ ]+t2rpntlvwz1t1[ ]+0x123\(%r31,%rax,8\),%tmm6 [ ]*[a-f0-9]+:[ ]*62 da 7f 08 4b b4 87 23 01 00 00[ ]+tileloadd[ ]+0x123\(%r31,%rax,4\),%tmm6 [ ]*[a-f0-9]+:[ ]*62 b2 7b 08 4a b4 fd 00 00 00 10[ ]+tileloaddrs[ ]+0x10000000\(%rbp,%r31,8\),%tmm6 [ ]*[a-f0-9]+:[ ]*62 fa 7f 08 4a 1c 20[ ]+tileloaddrs[ ]+\(%r16,%riz,1\),%tmm3 @@ -286,14 +278,6 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 52 87 00 f7 df[ ]+shrx[ ]+%r31,%r15,%r11 [ ]*[a-f0-9]+:[ ]*62 5a 87 00 f7 bc 87 23 01 00 00[ ]+shrx[ ]+%r31,0x123\(%r31,%rax,4\),%r15 [ ]*[a-f0-9]+:[ ]*62 da 7d 08 49 84 87 23 01 00 00[ ]+sttilecfg[ ]+0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 7c 08 6e b4 c7 23 01 00 00[ ]+t2rpntlvwz0[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 dd 7c 08 f8 b4 c7 23 01 00 00[ ]+t2rpntlvwz0rs[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 dd 7c 08 f9 b4 c7 23 01 00 00[ ]+t2rpntlvwz0rst1[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 da 7c 08 6f b4 c7 23 01 00 00[ ]+t2rpntlvwz0t1[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 da 7d 08 6e b4 c7 23 01 00 00[ ]+t2rpntlvwz1[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 dd 7d 08 f8 b4 c7 23 01 00 00[ ]+t2rpntlvwz1rs[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 dd 7d 08 f9 b4 c7 23 01 00 00[ ]+t2rpntlvwz1rst1[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 da 7d 08 6f b4 c7 23 01 00 00[ ]+t2rpntlvwz1t1[ ]+0x123\(%r31,%rax,8\),%tmm6 [ ]*[a-f0-9]+:[ ]*62 da 7f 08 4b b4 87 23 01 00 00[ ]+tileloadd[ ]+0x123\(%r31,%rax,4\),%tmm6 [ ]*[a-f0-9]+:[ ]*62 b2 7b 08 4a b4 fd 00 00 00 10[ ]+tileloaddrs[ ]+0x10000000\(%rbp,%r31,8\),%tmm6 [ ]*[a-f0-9]+:[ ]*62 fa 7f 08 4a 1c 20[ ]+tileloaddrs[ ]+\(%r16,%riz,1\),%tmm3 diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d index d9ebf3b1d53..64498ff088f 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.d @@ -139,14 +139,6 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 52 87 00 f7 df[ ]+shrx[ ]+%r31,%r15,%r11 [ ]*[a-f0-9]+:[ ]*62 5a 87 00 f7 bc 87 23 01 00 00[ ]+shrx[ ]+%r31,0x123\(%r31,%rax,4\),%r15 [ ]*[a-f0-9]+:[ ]*62 da 7d 08 49 84 87 23 01 00 00[ ]+sttilecfg[ ]+0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 7c 08 6e b4 c7 23 01 00 00[ ]+t2rpntlvwz0[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 dd 7c 08 f8 b4 c7 23 01 00 00[ ]+t2rpntlvwz0rs[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 dd 7c 08 f9 b4 c7 23 01 00 00[ ]+t2rpntlvwz0rst1[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 da 7c 08 6f b4 c7 23 01 00 00[ ]+t2rpntlvwz0t1[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 da 7d 08 6e b4 c7 23 01 00 00[ ]+t2rpntlvwz1[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 dd 7d 08 f8 b4 c7 23 01 00 00[ ]+t2rpntlvwz1rs[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 dd 7d 08 f9 b4 c7 23 01 00 00[ ]+t2rpntlvwz1rst1[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 da 7d 08 6f b4 c7 23 01 00 00[ ]+t2rpntlvwz1t1[ ]+0x123\(%r31,%rax,8\),%tmm6 [ ]*[a-f0-9]+:[ ]*62 da 7f 08 4b b4 87 23 01 00 00[ ]+tileloadd[ ]+0x123\(%r31,%rax,4\),%tmm6 [ ]*[a-f0-9]+:[ ]*62 b2 7b 08 4a b4 fd 00 00 00 10[ ]+tileloaddrs[ ]+0x10000000\(%rbp,%r31,8\),%tmm6 [ ]*[a-f0-9]+:[ ]*62 fa 7f 08 4a 1c 20[ ]+tileloaddrs[ ]+\(%r16,%riz,1\),%tmm3 @@ -286,14 +278,6 @@ Disassembly of section \.text: [ ]*[a-f0-9]+:[ ]*62 52 87 00 f7 df[ ]+shrx[ ]+%r31,%r15,%r11 [ ]*[a-f0-9]+:[ ]*62 5a 87 00 f7 bc 87 23 01 00 00[ ]+shrx[ ]+%r31,0x123\(%r31,%rax,4\),%r15 [ ]*[a-f0-9]+:[ ]*62 da 7d 08 49 84 87 23 01 00 00[ ]+sttilecfg[ ]+0x123\(%r31,%rax,4\) -[ ]*[a-f0-9]+:[ ]*62 da 7c 08 6e b4 c7 23 01 00 00[ ]+t2rpntlvwz0[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 dd 7c 08 f8 b4 c7 23 01 00 00[ ]+t2rpntlvwz0rs[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 dd 7c 08 f9 b4 c7 23 01 00 00[ ]+t2rpntlvwz0rst1[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 da 7c 08 6f b4 c7 23 01 00 00[ ]+t2rpntlvwz0t1[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 da 7d 08 6e b4 c7 23 01 00 00[ ]+t2rpntlvwz1[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 dd 7d 08 f8 b4 c7 23 01 00 00[ ]+t2rpntlvwz1rs[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 dd 7d 08 f9 b4 c7 23 01 00 00[ ]+t2rpntlvwz1rst1[ ]+0x123\(%r31,%rax,8\),%tmm6 -[ ]*[a-f0-9]+:[ ]*62 da 7d 08 6f b4 c7 23 01 00 00[ ]+t2rpntlvwz1t1[ ]+0x123\(%r31,%rax,8\),%tmm6 [ ]*[a-f0-9]+:[ ]*62 da 7f 08 4b b4 87 23 01 00 00[ ]+tileloadd[ ]+0x123\(%r31,%rax,4\),%tmm6 [ ]*[a-f0-9]+:[ ]*62 b2 7b 08 4a b4 fd 00 00 00 10[ ]+tileloaddrs[ ]+0x10000000\(%rbp,%r31,8\),%tmm6 [ ]*[a-f0-9]+:[ ]*62 fa 7f 08 4a 1c 20[ ]+tileloaddrs[ ]+\(%r16,%riz,1\),%tmm3 diff --git a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s index f0bcb3a9beb..f95ff503281 100644 --- a/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s +++ b/gas/testsuite/gas/i386/x86-64-apx-evex-promoted.s @@ -133,14 +133,6 @@ _start: shrx %r31,%r15,%r11 shrx %r31,0x123(%r31,%rax,4),%r15 sttilecfg 0x123(%r31,%rax,4) - t2rpntlvwz0 0x123(%r31,%rax,8),%tmm6 - t2rpntlvwz0rs 0x123(%r31,%rax,8),%tmm6 - t2rpntlvwz0rst1 0x123(%r31,%rax,8),%tmm6 - t2rpntlvwz0t1 0x123(%r31,%rax,8),%tmm6 - t2rpntlvwz1 0x123(%r31,%rax,8),%tmm6 - t2rpntlvwz1rs 0x123(%r31,%rax,8),%tmm6 - t2rpntlvwz1rst1 0x123(%r31,%rax,8),%tmm6 - t2rpntlvwz1t1 0x123(%r31,%rax,8),%tmm6 tileloadd 0x123(%r31,%rax,4),%tmm6 tileloaddrs 0x10000000(%rbp, %r31, 8), %tmm6 tileloaddrs (%r16), %tmm3 @@ -282,14 +274,6 @@ _start: shrx r11,r15,r31 shrx r15,QWORD PTR [r31+rax*4+0x123],r31 sttilecfg [r31+rax*4+0x123] - t2rpntlvwz0 tmm6,[r31+rax*8+0x123] - t2rpntlvwz0rs tmm6,[r31+rax*8+0x123] - t2rpntlvwz0rst1 tmm6,[r31+rax*8+0x123] - t2rpntlvwz0t1 tmm6,[r31+rax*8+0x123] - t2rpntlvwz1 tmm6,[r31+rax*8+0x123] - t2rpntlvwz1rs tmm6,[r31+rax*8+0x123] - t2rpntlvwz1rst1 tmm6,[r31+rax*8+0x123] - t2rpntlvwz1t1 tmm6,[r31+rax*8+0x123] tileloadd tmm6,[r31+rax*4+0x123] tileloaddrs tmm6, [rbp+r31*8+0x10000000] tileloaddrs tmm3, [r16] diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h index 3c24c224efc..5281ab6ab9e 100644 --- a/opcodes/i386-dis-evex.h +++ b/opcodes/i386-dis-evex.h @@ -416,8 +416,8 @@ static const struct dis386 evex_table[][256] = { { Bad_Opcode }, { Bad_Opcode }, { X86_64_TABLE (X86_64_EVEX_0F386D) }, - { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F386E) }, - { X86_64_EVEX_FROM_VEX_TABLE (X86_64_VEX_0F386F) }, + { Bad_Opcode }, + { Bad_Opcode }, /* 70 */ { VEX_W_TABLE (EVEX_W_0F3870) }, { "vpshldv%DQ", { XM, Vex, EXx }, PREFIX_DATA }, diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index a9d229c236e..97ded8c8b50 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -1047,20 +1047,6 @@ process_i386_cpu_flag (FILE *table, char *flag, all[Cpu64].value = 1; output_cpu_flags(table, all, ARRAY_SIZE (all), -1, comma, indent, lineno); - - /* For APX_F extension of multiple cpuid enabled insns, we cannot use - APX_F(cpuid_A&cpuid_B) in the opcode table, as the result would fail - to be parsed. Furthermore, the result also wouldn't be quite valid. - However, the assembler's cpu_flags_match() will simply propagate "any" - to "all", zapping "any" afterwards altogether. IOW in this situation - both masks have "&&" meaning. Set the missing flag here. */ - if (all[CpuAMX_TRANSPOSE].value && all[CpuAMX_MOVRS].value) - { - if (!any[CpuAPX_F].value || !any[CpuAMX_MOVRS].value) - fail ("%s: %d: internal error: APX_F=%d AMX_MOVRS=%d\n", - filename, lineno, any[CpuAPX_F].value, any[CpuAMX_MOVRS].value); - any[CpuAMX_TRANSPOSE].value = 1; - } } output_cpu_flags (table, any, ARRAY_SIZE (any), name != NULL, diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 6eadc2ebf73..d6070eb1fd0 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -3244,8 +3244,8 @@ tilezero, 0xf249, AMX_TILE, Modrm|Vex128|Space0F38|VexW0|NoSuf, { RegTMM } -t2rpntlvw, 0x6e | , APX_F(AMX_TRANSPOSE), Sibmem|Vex128|EVex128|Space0F38|VexW0|NoSuf|ImplicitGroup, { Unspecified|BaseIndex, RegTMM } -t2rpntlvwrs, 0xf8 | , AMX_TRANSPOSE&APX_F(AMX_MOVRS), Sibmem|Vex128|EVex128|Map5|VexW0|NoSuf|ImplicitGroup, { Unspecified|BaseIndex, RegTMM } +t2rpntlvw, 0x6e | , AMX_TRANSPOSE, Sibmem|Vex128|Space0F38|VexW0|NoSuf|ImplicitGroup, { Unspecified|BaseIndex, RegTMM } +t2rpntlvwrs, 0xf8 | , AMX_TRANSPOSE&AMX_MOVRS, Sibmem|Vex128|Map5|VexW0|NoSuf|ImplicitGroup, { Unspecified|BaseIndex, RegTMM } diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index c8fbb93d414..94a913b38a7 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -43218,80 +43218,80 @@ static const insn_template i386_optab[] = 0, 0, 0, 1, 0, 0 } } } }, { MN_t2rpntlvwz0, 0x6e | 0x0, 2, SPACE_0F38, None, { 0, 0, 0, 1, 0, 0, 0, 0, 5, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 0, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 0, 1, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } } } }, { MN_t2rpntlvwz0t1, 0x6e | 0x1, 2, SPACE_0F38, None, { 0, 0, 0, 1, 0, 0, 0, 0, 5, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 0, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 0, 1, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } } } }, { MN_t2rpntlvwz1, 0x6e | 0x0, 2, SPACE_0F38, None, { 0, 0, 0, 1, 0, 0, 0, 0, 5, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 1, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 0, 1, 1, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } } } }, { MN_t2rpntlvwz1t1, 0x6e | 0x1, 2, SPACE_0F38, None, { 0, 0, 0, 1, 0, 0, 0, 0, 5, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 1, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 0, 1, 1, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, - { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } } } }, { MN_t2rpntlvwz0rs, 0xf8 | 0x0, 2, SPACE_MAP5, None, { 0, 0, 0, 1, 0, 0, 0, 0, 5, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 0, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 0, 1, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, { { 119, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, - { { 119, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } } } }, { MN_t2rpntlvwz0rst1, 0xf8 | 0x1, 2, SPACE_MAP5, None, { 0, 0, 0, 1, 0, 0, 0, 0, 5, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 0, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 0, 1, 0, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, { { 119, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, - { { 119, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } } } }, { MN_t2rpntlvwz1rs, 0xf8 | 0x0, 2, SPACE_MAP5, None, { 0, 0, 0, 1, 0, 0, 0, 0, 5, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 1, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 0, 1, 1, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, { { 119, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, - { { 119, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 } } } }, { MN_t2rpntlvwz1rst1, 0xf8 | 0x1, 2, SPACE_MAP5, None, { 0, 0, 0, 1, 0, 0, 0, 0, 5, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, - 0, 0, 0, 1, 0, 1, 1, 4, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 1, 0, 1, 1, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }, { { 119, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0 } }, - { { 119, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0 } }, + { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { { 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,