From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Date: Thu, 4 Mar 2021 22:10:52 +0000 (+0000)
Subject: esp: implement FIFO flush command
X-Git-Tag: v6.0.0-rc0~55^2~11
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=bb27b13d183a4fdf8d63072861e03d320e41cb0e;p=thirdparty%2Fqemu.git

esp: implement FIFO flush command

At this point it is now possible to properly implement the FIFO flush command
without causing guest errors.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20210304221103.6369-32-mark.cave-ayland@ilande.co.uk>
---

diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index 2dded90be65..6aae6f91c28 100644
--- a/hw/scsi/esp.c
+++ b/hw/scsi/esp.c
@@ -769,6 +769,8 @@ void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val)
         case CMD_FLUSH:
             trace_esp_mem_writeb_cmd_flush(val);
             /*s->ti_size = 0;*/
+            s->ti_wptr = 0;
+            s->ti_rptr = 0;
             s->rregs[ESP_RINTR] = INTR_FC;
             s->rregs[ESP_RSEQ] = 0;
             s->rregs[ESP_RFLAGS] = 0;