From: Anton Blanchard <anton@samba.org>
Date: Wed, 7 Aug 2013 00:47:00 +0000 (+1000)
Subject: target-ppc: POWER7 supports the MSR_LE bit
X-Git-Tag: v1.7.0-rc0~142^2~14
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=bb429d224733c263456c105eab93cd2b5e55add2;p=thirdparty%2Fqemu.git

target-ppc: POWER7 supports the MSR_LE bit

Add MSR_LE to the msr_mask for POWER7.

Signed-off-by: Anton Blanchard <anton@samba.org>
Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
---

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 609f7970830..d2645bad28d 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7227,7 +7227,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
                        PPC_SEGMENT_64B | PPC_SLBI |
                        PPC_POPCNTB | PPC_POPCNTWD;
     pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX | PPC2_ISA205;
-    pcc->msr_mask = 0x800000000204FF36ULL;
+    pcc->msr_mask = 0x800000000204FF37ULL;
     pcc->mmu_model = POWERPC_MMU_2_06;
 #if defined(CONFIG_SOFTMMU)
     pcc->handle_mmu_fault = ppc_hash64_handle_mmu_fault;