From: Greg Kroah-Hartman Date: Mon, 17 Oct 2022 05:25:40 +0000 (+0200) Subject: 6.0-stable patches X-Git-Tag: v5.4.219~38 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=bc756992727631082e23aa0b6685405d1ae71dea;p=thirdparty%2Fkernel%2Fstable-queue.git 6.0-stable patches added patches: perf-intel-pt-fix-segfault-in-intel_pt_print_info-with-uclibc.patch perf-intel-pt-fix-system_wide-dummy-event-for-hybrid.patch perf-skip-and-warn-on-unknown-format-confign-attrs.patch --- diff --git a/queue-6.0/perf-intel-pt-fix-segfault-in-intel_pt_print_info-with-uclibc.patch b/queue-6.0/perf-intel-pt-fix-segfault-in-intel_pt_print_info-with-uclibc.patch new file mode 100644 index 00000000000..860424e22d2 --- /dev/null +++ b/queue-6.0/perf-intel-pt-fix-segfault-in-intel_pt_print_info-with-uclibc.patch @@ -0,0 +1,56 @@ +From 5a3d47071f0ced0431ef82a5fb6bd077ed9493db Mon Sep 17 00:00:00 2001 +From: Adrian Hunter +Date: Wed, 12 Oct 2022 11:22:58 +0300 +Subject: perf intel-pt: Fix segfault in intel_pt_print_info() with uClibc + +From: Adrian Hunter + +commit 5a3d47071f0ced0431ef82a5fb6bd077ed9493db upstream. + +uClibc segfaulted because NULL was passed as the format to fprintf(). + +That happened because one of the format strings was missing and +intel_pt_print_info() didn't check that before calling fprintf(). + +Add the missing format string, and check format is not NULL before calling +fprintf(). + +Fixes: 11fa7cb86b56d361 ("perf tools: Pass Intel PT information for decoding MTC and CYC") +Signed-off-by: Adrian Hunter +Acked-by: Namhyung Kim +Cc: Adrian Hunter +Cc: Ian Rogers +Cc: Jiri Olsa +Cc: stable@vger.kernel.org +Link: https://lore.kernel.org/r/20221012082259.22394-2-adrian.hunter@intel.com +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Greg Kroah-Hartman +--- + tools/perf/util/intel-pt.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +--- a/tools/perf/util/intel-pt.c ++++ b/tools/perf/util/intel-pt.c +@@ -4033,6 +4033,7 @@ static const char * const intel_pt_info_ + [INTEL_PT_SNAPSHOT_MODE] = " Snapshot mode %"PRId64"\n", + [INTEL_PT_PER_CPU_MMAPS] = " Per-cpu maps %"PRId64"\n", + [INTEL_PT_MTC_BIT] = " MTC bit %#"PRIx64"\n", ++ [INTEL_PT_MTC_FREQ_BITS] = " MTC freq bits %#"PRIx64"\n", + [INTEL_PT_TSC_CTC_N] = " TSC:CTC numerator %"PRIu64"\n", + [INTEL_PT_TSC_CTC_D] = " TSC:CTC denominator %"PRIu64"\n", + [INTEL_PT_CYC_BIT] = " CYC bit %#"PRIx64"\n", +@@ -4047,8 +4048,12 @@ static void intel_pt_print_info(__u64 *a + if (!dump_trace) + return; + +- for (i = start; i <= finish; i++) +- fprintf(stdout, intel_pt_info_fmts[i], arr[i]); ++ for (i = start; i <= finish; i++) { ++ const char *fmt = intel_pt_info_fmts[i]; ++ ++ if (fmt) ++ fprintf(stdout, fmt, arr[i]); ++ } + } + + static void intel_pt_print_info_str(const char *name, const char *str) diff --git a/queue-6.0/perf-intel-pt-fix-system_wide-dummy-event-for-hybrid.patch b/queue-6.0/perf-intel-pt-fix-system_wide-dummy-event-for-hybrid.patch new file mode 100644 index 00000000000..714913878d7 --- /dev/null +++ b/queue-6.0/perf-intel-pt-fix-system_wide-dummy-event-for-hybrid.patch @@ -0,0 +1,38 @@ +From 6cef7dab3e2e5cb23a13569c3880c0532326748c Mon Sep 17 00:00:00 2001 +From: Adrian Hunter +Date: Wed, 12 Oct 2022 11:22:59 +0300 +Subject: perf intel-pt: Fix system_wide dummy event for hybrid + +From: Adrian Hunter + +commit 6cef7dab3e2e5cb23a13569c3880c0532326748c upstream. + +User space tasks can migrate between CPUs, so when tracing selected CPUs, +system-wide sideband is still needed, however evlist->core.has_user_cpus +is not set in the hybrid case, so check the target cpu_list instead. + +Fixes: 7d189cadbeebc778 ("perf intel-pt: Track sideband system-wide when needed") +Signed-off-by: Adrian Hunter +Acked-by: Namhyung Kim +Cc: Adrian Hunter +Cc: Ian Rogers +Cc: Jiri Olsa +Cc: stable@vger.kernel.org +Link: https://lore.kernel.org/r/20221012082259.22394-3-adrian.hunter@intel.com +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Greg Kroah-Hartman +--- + tools/perf/arch/x86/util/intel-pt.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/tools/perf/arch/x86/util/intel-pt.c ++++ b/tools/perf/arch/x86/util/intel-pt.c +@@ -871,7 +871,7 @@ static int intel_pt_recording_options(st + * User space tasks can migrate between CPUs, so when tracing + * selected CPUs, sideband for all CPUs is still needed. + */ +- need_system_wide_tracking = evlist->core.has_user_cpus && ++ need_system_wide_tracking = opts->target.cpu_list && + !intel_pt_evsel->core.attr.exclude_user; + + tracking_evsel = evlist__add_aux_dummy(evlist, need_system_wide_tracking); diff --git a/queue-6.0/perf-skip-and-warn-on-unknown-format-confign-attrs.patch b/queue-6.0/perf-skip-and-warn-on-unknown-format-confign-attrs.patch new file mode 100644 index 00000000000..fe887d7ddb9 --- /dev/null +++ b/queue-6.0/perf-skip-and-warn-on-unknown-format-confign-attrs.patch @@ -0,0 +1,160 @@ +From e552b7be12ed62357df84392efa525ecb01910fb Mon Sep 17 00:00:00 2001 +From: Rob Herring +Date: Tue, 4 Oct 2022 14:12:35 -0500 +Subject: perf: Skip and warn on unknown format 'configN' attrs + +From: Rob Herring + +commit e552b7be12ed62357df84392efa525ecb01910fb upstream. + +If the kernel exposes a new perf_event_attr field in a format attr, perf +will return an error stating the specified PMU can't be found. For +example, a format attr with 'config3:0-63' causes an error as config3 is +unknown to perf. This causes a compatibility issue between a newer +kernel with older perf tool. + +Before this change with a kernel adding 'config3' I get: + + $ perf record -e arm_spe// -- true + event syntax error: 'arm_spe//' + \___ Cannot find PMU `arm_spe'. Missing kernel support? + Run 'perf list' for a list of valid events + + Usage: perf record [] [] + or: perf record [] -- [] + + -e, --event event selector. use 'perf list' to list + available events + +After this change, I get: + + $ perf record -e arm_spe// -- true + WARNING: 'arm_spe_0' format 'inv_event_filter' requires 'perf_event_attr::config3' which is not supported by this version of perf! + [ perf record: Woken up 2 times to write data ] + [ perf record: Captured and wrote 0.091 MB perf.data ] + +To support unknown configN formats, rework the YACC implementation to +pass any config[0-9]+ format to perf_pmu__new_format() to handle with a +warning. + +Reviewed-by: Namhyung Kim +Signed-off-by: Rob Herring +Tested-by: Leo Yan +Cc: Alexander Shishkin +Cc: Ingo Molnar +Cc: James Clark +Cc: Jiri Olsa +Cc: Mark Rutland +Cc: Peter Zijlstra +Cc: stable@vger.kernel.org +Link: https://lore.kernel.org/r/20220914-arm-perf-tool-spe1-2-v2-v4-1-83c098e6212e@kernel.org +Signed-off-by: Arnaldo Carvalho de Melo +Signed-off-by: Greg Kroah-Hartman +--- + tools/perf/util/parse-events.c | 3 +++ + tools/perf/util/pmu.c | 17 +++++++++++++++++ + tools/perf/util/pmu.h | 2 ++ + tools/perf/util/pmu.l | 2 -- + tools/perf/util/pmu.y | 15 ++++----------- + 5 files changed, 26 insertions(+), 13 deletions(-) + +--- a/tools/perf/util/parse-events.c ++++ b/tools/perf/util/parse-events.c +@@ -254,6 +254,9 @@ __add_event(struct list_head *list, int + struct perf_cpu_map *cpus = pmu ? perf_cpu_map__get(pmu->cpus) : + cpu_list ? perf_cpu_map__new(cpu_list) : NULL; + ++ if (pmu) ++ perf_pmu__warn_invalid_formats(pmu); ++ + if (pmu && attr->type == PERF_TYPE_RAW) + perf_pmu__warn_invalid_config(pmu, attr->config, name); + +--- a/tools/perf/util/pmu.c ++++ b/tools/perf/util/pmu.c +@@ -1005,6 +1005,23 @@ err: + return NULL; + } + ++void perf_pmu__warn_invalid_formats(struct perf_pmu *pmu) ++{ ++ struct perf_pmu_format *format; ++ ++ /* fake pmu doesn't have format list */ ++ if (pmu == &perf_pmu__fake) ++ return; ++ ++ list_for_each_entry(format, &pmu->format, list) ++ if (format->value >= PERF_PMU_FORMAT_VALUE_CONFIG_END) { ++ pr_warning("WARNING: '%s' format '%s' requires 'perf_event_attr::config%d'" ++ "which is not supported by this version of perf!\n", ++ pmu->name, format->name, format->value); ++ return; ++ } ++} ++ + static struct perf_pmu *pmu_find(const char *name) + { + struct perf_pmu *pmu; +--- a/tools/perf/util/pmu.h ++++ b/tools/perf/util/pmu.h +@@ -17,6 +17,7 @@ enum { + PERF_PMU_FORMAT_VALUE_CONFIG, + PERF_PMU_FORMAT_VALUE_CONFIG1, + PERF_PMU_FORMAT_VALUE_CONFIG2, ++ PERF_PMU_FORMAT_VALUE_CONFIG_END, + }; + + #define PERF_PMU_FORMAT_BITS 64 +@@ -139,6 +140,7 @@ int perf_pmu__caps_parse(struct perf_pmu + + void perf_pmu__warn_invalid_config(struct perf_pmu *pmu, __u64 config, + const char *name); ++void perf_pmu__warn_invalid_formats(struct perf_pmu *pmu); + + bool perf_pmu__has_hybrid(void); + int perf_pmu__match(char *pattern, char *name, char *tok); +--- a/tools/perf/util/pmu.l ++++ b/tools/perf/util/pmu.l +@@ -27,8 +27,6 @@ num_dec [0-9]+ + + {num_dec} { return value(10); } + config { return PP_CONFIG; } +-config1 { return PP_CONFIG1; } +-config2 { return PP_CONFIG2; } + - { return '-'; } + : { return ':'; } + , { return ','; } +--- a/tools/perf/util/pmu.y ++++ b/tools/perf/util/pmu.y +@@ -20,7 +20,7 @@ do { \ + + %} + +-%token PP_CONFIG PP_CONFIG1 PP_CONFIG2 ++%token PP_CONFIG + %token PP_VALUE PP_ERROR + %type PP_VALUE + %type bit_term +@@ -47,18 +47,11 @@ PP_CONFIG ':' bits + $3)); + } + | +-PP_CONFIG1 ':' bits ++PP_CONFIG PP_VALUE ':' bits + { + ABORT_ON(perf_pmu__new_format(format, name, +- PERF_PMU_FORMAT_VALUE_CONFIG1, +- $3)); +-} +-| +-PP_CONFIG2 ':' bits +-{ +- ABORT_ON(perf_pmu__new_format(format, name, +- PERF_PMU_FORMAT_VALUE_CONFIG2, +- $3)); ++ $2, ++ $4)); + } + + bits: diff --git a/queue-6.0/series b/queue-6.0/series index bf83632fa59..a6859480c84 100644 --- a/queue-6.0/series +++ b/queue-6.0/series @@ -931,3 +931,6 @@ usb-typec-ucsi-don-t-warn-on-probe-deferral.patch clk-bcm2835-round-uart-input-clock-up.patch net-lan966x-fix-return-type-of-lan966x_port_xmit.patch net-sparx5-fix-return-type-of-sparx5_port_xmit_impl.patch +perf-skip-and-warn-on-unknown-format-confign-attrs.patch +perf-intel-pt-fix-segfault-in-intel_pt_print_info-with-uclibc.patch +perf-intel-pt-fix-system_wide-dummy-event-for-hybrid.patch