From: Greg Kroah-Hartman Date: Fri, 4 Jul 2025 09:02:26 +0000 (+0200) Subject: verify 2 drm patches in 6.15 X-Git-Tag: v6.1.143~10 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=bcfcd9a9038c9b539b96350475d4f013732d9581;p=thirdparty%2Fkernel%2Fstable-queue.git verify 2 drm patches in 6.15 --- diff --git a/queue-6.15/drm-amd-display-add-early-8b-10b-channel-equalizatio.patch b/queue-6.15/drm-amd-display-add-early-8b-10b-channel-equalization-test-pattern-sequence.patch similarity index 76% rename from queue-6.15/drm-amd-display-add-early-8b-10b-channel-equalizatio.patch rename to queue-6.15/drm-amd-display-add-early-8b-10b-channel-equalization-test-pattern-sequence.patch index 5912d2a7da..5c1e54124e 100644 --- a/queue-6.15/drm-amd-display-add-early-8b-10b-channel-equalizatio.patch +++ b/queue-6.15/drm-amd-display-add-early-8b-10b-channel-equalization-test-pattern-sequence.patch @@ -1,12 +1,11 @@ -From eaae566ecd7ebfb4e2d25344bc3bbdc2027b79d1 Mon Sep 17 00:00:00 2001 -From: Sasha Levin +From 8989cb919b27cd0d2aadb7f1d144cedbb12e6fca Mon Sep 17 00:00:00 2001 +From: Michael Strauss Date: Mon, 4 Dec 2023 16:30:39 +0800 -Subject: drm/amd/display: Add early 8b/10b channel equalization test pattern - sequence +Subject: drm/amd/display: Add early 8b/10b channel equalization test pattern sequence From: Michael Strauss -[ Upstream commit 8989cb919b27cd0d2aadb7f1d144cedbb12e6fca ] +commit 8989cb919b27cd0d2aadb7f1d144cedbb12e6fca upstream. [WHY] Early EQ pattern sequence is required for some LTTPR + old dongle @@ -25,20 +24,18 @@ Signed-off-by: TungYu Lu Signed-off-by: Ray Wu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher -Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman --- - .../dc/link/protocols/link_dp_capability.c | 8 +++ - .../dc/link/protocols/link_dp_capability.h | 3 ++ - .../dc/link/protocols/link_dp_training.c | 1 - - .../link/protocols/link_dp_training_8b_10b.c | 52 +++++++++++++++++-- - .../amd/display/include/link_service_types.h | 2 + + drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c | 8 + + drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.h | 3 + drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c | 1 + drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c | 52 +++++++++- + drivers/gpu/drm/amd/display/include/link_service_types.h | 2 5 files changed, 62 insertions(+), 4 deletions(-) -diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c -index 21ee0d96c9d48..9d49e77a24a1f 100644 --- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c +++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c -@@ -158,6 +158,14 @@ uint8_t dp_parse_lttpr_repeater_count(uint8_t lttpr_repeater_count) +@@ -158,6 +158,14 @@ uint8_t dp_parse_lttpr_repeater_count(ui return 0; // invalid value } @@ -53,11 +50,9 @@ index 21ee0d96c9d48..9d49e77a24a1f 100644 uint32_t link_bw_kbps_from_raw_frl_link_rate_data(uint8_t bw) { switch (bw) { -diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.h b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.h -index 0ce0af3ddbebe..940b147cc5d42 100644 --- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.h +++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.h -@@ -48,6 +48,9 @@ enum dc_status dp_retrieve_lttpr_cap(struct dc_link *link); +@@ -48,6 +48,9 @@ enum dc_status dp_retrieve_lttpr_cap(str /* Convert PHY repeater count read from DPCD uint8_t. */ uint8_t dp_parse_lttpr_repeater_count(uint8_t lttpr_repeater_count); @@ -67,8 +62,6 @@ index 0ce0af3ddbebe..940b147cc5d42 100644 bool dp_is_sink_present(struct dc_link *link); bool dp_is_lttpr_present(struct dc_link *link); -diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c -index ef358afdfb65b..2dc1a660e5045 100644 --- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c +++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c @@ -785,7 +785,6 @@ void override_training_settings( @@ -79,8 +72,6 @@ index ef358afdfb65b..2dc1a660e5045 100644 } enum dc_dp_training_pattern decide_cr_training_pattern( -diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c -index 5a5d48fadbf27..66d0fb1b9b9d2 100644 --- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c +++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c @@ -142,6 +142,14 @@ void decide_8b_10b_training_settings( @@ -98,7 +89,7 @@ index 5a5d48fadbf27..66d0fb1b9b9d2 100644 } enum lttpr_mode dp_decide_8b_10b_lttpr_mode(struct dc_link *link) -@@ -173,6 +181,42 @@ enum lttpr_mode dp_decide_8b_10b_lttpr_mode(struct dc_link *link) +@@ -173,6 +181,42 @@ enum lttpr_mode dp_decide_8b_10b_lttpr_m return LTTPR_MODE_NON_LTTPR; } @@ -141,7 +132,7 @@ index 5a5d48fadbf27..66d0fb1b9b9d2 100644 enum link_training_result perform_8b_10b_clock_recovery_sequence( struct dc_link *link, const struct link_resource *link_res, -@@ -383,7 +427,7 @@ enum link_training_result dp_perform_8b_10b_link_training( +@@ -383,7 +427,7 @@ enum link_training_result dp_perform_8b_ { enum link_training_result status = LINK_TRAINING_SUCCESS; @@ -150,7 +141,7 @@ index 5a5d48fadbf27..66d0fb1b9b9d2 100644 uint8_t repeater_id; uint8_t lane = 0; -@@ -391,14 +435,16 @@ enum link_training_result dp_perform_8b_10b_link_training( +@@ -391,14 +435,16 @@ enum link_training_result dp_perform_8b_ start_clock_recovery_pattern_early(link, link_res, lt_settings, DPRX); /* 1. set link rate, lane count and spread. */ @@ -169,8 +160,6 @@ index 5a5d48fadbf27..66d0fb1b9b9d2 100644 for (repeater_id = repeater_cnt; (repeater_id > 0 && status == LINK_TRAINING_SUCCESS); repeater_id--) { -diff --git a/drivers/gpu/drm/amd/display/include/link_service_types.h b/drivers/gpu/drm/amd/display/include/link_service_types.h -index 1867aac57cf2c..da74ed66c8f9d 100644 --- a/drivers/gpu/drm/amd/display/include/link_service_types.h +++ b/drivers/gpu/drm/amd/display/include/link_service_types.h @@ -89,6 +89,8 @@ struct link_training_settings { @@ -182,6 +171,3 @@ index 1867aac57cf2c..da74ed66c8f9d 100644 /* disallow different lanes to have different lane settings */ bool disallow_per_lane_settings; /* dpcd lane settings will always use the same hw lane settings --- -2.39.5 - diff --git a/queue-6.15/drm-amd-display-get-lttpr-ieee-oui-device-id-from-cl.patch b/queue-6.15/drm-amd-display-get-lttpr-ieee-oui-device-id-from-closest-lttpr-to-host.patch similarity index 87% rename from queue-6.15/drm-amd-display-get-lttpr-ieee-oui-device-id-from-cl.patch rename to queue-6.15/drm-amd-display-get-lttpr-ieee-oui-device-id-from-closest-lttpr-to-host.patch index 467c62c0ff..607d08ef4a 100644 --- a/queue-6.15/drm-amd-display-get-lttpr-ieee-oui-device-id-from-cl.patch +++ b/queue-6.15/drm-amd-display-get-lttpr-ieee-oui-device-id-from-closest-lttpr-to-host.patch @@ -1,12 +1,11 @@ -From da322003b880402456776e60777932936fd17d3a Mon Sep 17 00:00:00 2001 -From: Sasha Levin +From d358a51444c88bcc995e471dc8cc840f19e4b374 Mon Sep 17 00:00:00 2001 +From: Michael Strauss Date: Wed, 26 Feb 2025 10:03:48 -0500 -Subject: drm/amd/display: Get LTTPR IEEE OUI/Device ID From Closest LTTPR To - Host +Subject: drm/amd/display: Get LTTPR IEEE OUI/Device ID From Closest LTTPR To Host From: Michael Strauss -[ Upstream commit d358a51444c88bcc995e471dc8cc840f19e4b374 ] +commit d358a51444c88bcc995e471dc8cc840f19e4b374 upstream. [WHY] These fields are read for the explicit purpose of detecting embedded LTTPRs @@ -31,14 +30,12 @@ Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher (cherry picked from commit 791897f5c77a2a65d0e500be4743af2ddf6eb061) Cc: stable@vger.kernel.org -Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman --- - drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 4 +- - .../dc/link/protocols/link_dp_capability.c | 38 +++++++++++++++---- + drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 4 - + drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c | 38 ++++++++-- 2 files changed, 33 insertions(+), 9 deletions(-) -diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h -index 77c87ad572207..bbd6701096ca9 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_dp_types.h @@ -1157,8 +1157,8 @@ struct dc_lttpr_caps { @@ -52,11 +49,9 @@ index 77c87ad572207..bbd6701096ca9 100644 }; struct dc_dongle_dfp_cap_ext { -diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c -index 9d49e77a24a1f..ed9d396e3d0ea 100644 --- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c +++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c -@@ -385,9 +385,15 @@ bool dp_is_128b_132b_signal(struct pipe_ctx *pipe_ctx) +@@ -385,9 +385,15 @@ bool dp_is_128b_132b_signal(struct pipe_ bool dp_is_lttpr_present(struct dc_link *link) { /* Some sink devices report invalid LTTPR revision, so don't validate against that cap */ @@ -73,7 +68,7 @@ index 9d49e77a24a1f..ed9d396e3d0ea 100644 } /* in DP compliance test, DPR-120 may have -@@ -1551,6 +1557,8 @@ enum dc_status dp_retrieve_lttpr_cap(struct dc_link *link) +@@ -1551,6 +1557,8 @@ enum dc_status dp_retrieve_lttpr_cap(str uint8_t lttpr_dpcd_data[10] = {0}; enum dc_status status; bool is_lttpr_present; @@ -82,7 +77,7 @@ index 9d49e77a24a1f..ed9d396e3d0ea 100644 /* Logic to determine LTTPR support*/ bool vbios_lttpr_interop = link->dc->caps.vbios_lttpr_aware; -@@ -1602,20 +1610,22 @@ enum dc_status dp_retrieve_lttpr_cap(struct dc_link *link) +@@ -1602,20 +1610,22 @@ enum dc_status dp_retrieve_lttpr_cap(str lttpr_dpcd_data[DP_LTTPR_ALPM_CAPABILITIES - DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV]; @@ -107,7 +102,7 @@ index 9d49e77a24a1f..ed9d396e3d0ea 100644 is_lttpr_present = dp_is_lttpr_present(link); DC_LOG_DC("is_lttpr_present = %d\n", is_lttpr_present); -@@ -1623,11 +1633,25 @@ enum dc_status dp_retrieve_lttpr_cap(struct dc_link *link) +@@ -1623,11 +1633,25 @@ enum dc_status dp_retrieve_lttpr_cap(str if (is_lttpr_present) { CONN_DATA_DETECT(link, lttpr_dpcd_data, sizeof(lttpr_dpcd_data), "LTTPR Caps: "); @@ -137,6 +132,3 @@ index 9d49e77a24a1f..ed9d396e3d0ea 100644 } return status; --- -2.39.5 - diff --git a/queue-6.15/series b/queue-6.15/series index 719b3c07c7..8cfe28fd9c 100644 --- a/queue-6.15/series +++ b/queue-6.15/series @@ -244,8 +244,8 @@ crypto-powerpc-poly1305-add-depends-on-broken-for-no.patch drm-amdgpu-mes-add-missing-locking-in-helper-functio.patch arm64-dts-qcom-x1e78100-t14s-fix-missing-hid-supplie.patch sched_ext-make-scx_group_set_weight-always-update-tg.patch -drm-amd-display-add-early-8b-10b-channel-equalizatio.patch -drm-amd-display-get-lttpr-ieee-oui-device-id-from-cl.patch +drm-amd-display-add-early-8b-10b-channel-equalization-test-pattern-sequence.patch +drm-amd-display-get-lttpr-ieee-oui-device-id-from-closest-lttpr-to-host.patch drm-amd-display-fix-default-dc-and-ac-levels.patch drm-amd-display-only-read-acpi-backlight-caps-once.patch drm-amd-display-optimize-custom-brightness-curve.patch