From: Chen Pei Date: Wed, 10 Sep 2025 09:41:36 +0000 (+0800) Subject: ACPI: SPCR: Add support for DBG2 RISC-V SBI port subtype X-Git-Tag: v6.18-rc1~151^2~2^5~1 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=bf4206d7ac278bbd1eb2cf02d25486c2cc61b298;p=thirdparty%2Fkernel%2Fstable.git ACPI: SPCR: Add support for DBG2 RISC-V SBI port subtype Commit 4aca2bef90bd1296 ("ACPICA: Headers: Add RISC-V SBI Subtype to DBG2") added the definition of ACPI_DBG2_RISCV_SBI_CON. Continue to implement its function so that the parameters of UART can be configured correctly. Subsequent calls to setup_earlycon() will reuse the earlycon based on SBI. Signed-off-by: Chen Pei Reviewed-by: Guo Ren (Alibaba Damo Academy) Link: https://patch.msgid.link/20250910094136.4423-1-cp0613@linux.alibaba.com [ rjw: Changelog edits ] Signed-off-by: Rafael J. Wysocki --- diff --git a/drivers/acpi/spcr.c b/drivers/acpi/spcr.c index cd36a97b0ea2c..208d6bbc65e03 100644 --- a/drivers/acpi/spcr.c +++ b/drivers/acpi/spcr.c @@ -141,6 +141,9 @@ int __init acpi_parse_spcr(bool enable_earlycon, bool enable_console) case ACPI_DBG2_16550_NVIDIA: uart = "uart"; break; + case ACPI_DBG2_RISCV_SBI_CON: + uart = "sbi"; + break; default: err = -ENOENT; goto done;