From: Kewen Lin Date: Mon, 26 Sep 2022 03:01:50 +0000 (-0500) Subject: rs6000: Fix condition of define_expand vec_shr_ [PR100645] X-Git-Tag: basepoints/gcc-14~4363 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=bfad7069b74c97000b698191c1945f07a6192db5;p=thirdparty%2Fgcc.git rs6000: Fix condition of define_expand vec_shr_ [PR100645] PR100645 exposes one latent bug in define_expand vec_shr_ that the current condition TARGET_ALTIVEC is too loose. The mode iterator VEC_L contains a few modes, they are not always supported as vector mode, VECTOR_UNIT_ALTIVEC_OR_VSX_P should be used like some other VEC_L usages. PR target/100645 gcc/ChangeLog: * config/rs6000/vector.md (vec_shr_): Replace condition TARGET_ALTIVEC with VECTOR_UNIT_ALTIVEC_OR_VSX_P. gcc/testsuite/ChangeLog: * gcc.target/powerpc/pr100645.c: New test. --- diff --git a/gcc/config/rs6000/vector.md b/gcc/config/rs6000/vector.md index a0d33d2f6044..0171705803c2 100644 --- a/gcc/config/rs6000/vector.md +++ b/gcc/config/rs6000/vector.md @@ -1475,7 +1475,7 @@ [(match_operand:VEC_L 0 "vlogical_operand") (match_operand:VEC_L 1 "vlogical_operand") (match_operand:QI 2 "reg_or_short_operand")] - "TARGET_ALTIVEC" + "VECTOR_UNIT_ALTIVEC_OR_VSX_P (mode)" { rtx bitshift = operands[2]; rtx shift; diff --git a/gcc/testsuite/gcc.target/powerpc/pr100645.c b/gcc/testsuite/gcc.target/powerpc/pr100645.c new file mode 100644 index 000000000000..c4e92cc80521 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr100645.c @@ -0,0 +1,13 @@ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-mdejagnu-cpu=power6 -maltivec" } */ + +/* This used to ICE. */ + +typedef long long v2di __attribute__ ((vector_size (16))); + +v2di +foo_v2di_l (v2di x) +{ + return __builtin_shuffle ((v2di){0, 0}, x, (v2di){3, 0}); +} +