From: Potin Lai <potin.lai.pt@gmail.com>
Date: Mon, 26 Dec 2022 05:45:35 +0000 (+0800)
Subject: ARM: dts: aspeed: bletchley: Enable wdtrst1
X-Git-Tag: v6.3-rc1~202^2~16^2~5
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=c021d9fe410adadf35a835098073e4528f2db728;p=thirdparty%2Fkernel%2Flinux.git

ARM: dts: aspeed: bletchley: Enable wdtrst1

Enable WDTRST1 external signal to send a reset pulse to peripherals while
BMC reset.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Link: https://lore.kernel.org/r/20221226054535.2836110-3-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
---

diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts
index 791f83aaac506..e899de681f475 100644
--- a/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts
@@ -1064,3 +1064,14 @@
 		bias-disable;
 	};
 };
+
+&wdt1 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdtrst1_default>;
+	aspeed,reset-type = "soc";
+	aspeed,external-signal;
+	aspeed,ext-push-pull;
+	aspeed,ext-active-high;
+	aspeed,ext-pulse-duration = <256>;
+};