From: Haochen Gui <guihaoc@gcc.gnu.org>
Date: Mon, 9 Oct 2023 06:34:46 +0000 (+0800)
Subject: rs6000: support 32bit inline lrint
X-Git-Tag: basepoints/gcc-15~5654
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=c1e474785859c9630fcae19c8d2d606f5642c636;p=thirdparty%2Fgcc.git

rs6000: support 32bit inline lrint

gcc/
	PR target/88558
	* config/rs6000/rs6000.md (lrint<mode>di2): Remove TARGET_FPRND
	from insn condition.
	(lrint<mode>si2): New insn pattern for 32bit lrint.

gcc/testsuite/
	PR target/106769
	* gcc.target/powerpc/pr88558.h: New.
	* gcc.target/powerpc/pr88558-p7.c: New.
	* gcc.target/powerpc/pr88558-p8.c: New.
---

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index fa433ef01887..d4337ce42a9d 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -6718,10 +6718,18 @@
   [(set (match_operand:DI 0 "gpc_reg_operand" "=d")
 	(unspec:DI [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")]
 		   UNSPEC_FCTID))]
-  "TARGET_HARD_FLOAT && TARGET_FPRND"
+  "TARGET_HARD_FLOAT"
   "fctid %0,%1"
   [(set_attr "type" "fp")])
 
+(define_insn "lrint<mode>si2"
+  [(set (match_operand:SI 0 "gpc_reg_operand" "=d")
+	(unspec:SI [(match_operand:SFDF 1 "gpc_reg_operand" "<rreg2>")]
+		   UNSPEC_FCTIW))]
+  "TARGET_HARD_FLOAT && TARGET_POPCNTD"
+  "fctiw %0,%1"
+  [(set_attr "type" "fp")])
+
 (define_insn "btrunc<mode>2"
   [(set (match_operand:SFDF 0 "gpc_reg_operand" "=d,wa")
 	(unspec:SFDF [(match_operand:SFDF 1 "gpc_reg_operand" "d,wa")]
diff --git a/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c b/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c
new file mode 100644
index 000000000000..3932656c5fd9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr88558-p7.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -fno-math-errno -mdejagnu-cpu=power7" } */
+
+/* -fno-math-errno is required to make {i,l,ll}rint{,f} inlined */
+
+#include "pr88558.h"
+
+/* { dg-final { scan-assembler-times {\mfctid\M} 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfctid\M} 2 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfctiw\M} 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfctiw\M} 4 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mstfiwx\M} 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mstfiwx\M} 4 { target ilp32 } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr88558-p8.c b/gcc/testsuite/gcc.target/powerpc/pr88558-p8.c
new file mode 100644
index 000000000000..1afc8fd4f0d1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr88558-p8.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-O2 -fno-math-errno -mdejagnu-cpu=power8" } */
+
+/* -fno-math-errno is required to make {i,l,ll}rint{,f} inlined */
+
+#include "pr88558.h"
+
+/* { dg-final { scan-assembler-times {\mfctid\M} 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfctid\M} 2 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mfctiw\M} 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mfctiw\M} 4 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mmfvsrwz\M} 2 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mmfvsrwz\M} 4 { target ilp32 } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr88558.h b/gcc/testsuite/gcc.target/powerpc/pr88558.h
new file mode 100644
index 000000000000..9c604faadd10
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr88558.h
@@ -0,0 +1,29 @@
+long int test1 (double a)
+{
+  return __builtin_lrint (a);
+}
+
+long long test2 (double a)
+{
+  return __builtin_llrint (a);
+}
+
+int test3 (double a)
+{
+  return __builtin_irint (a);
+}
+
+long int test4 (float a)
+{
+  return __builtin_lrintf (a);
+}
+
+long long test5 (float a)
+{
+  return __builtin_llrintf (a);
+}
+
+int test6 (float a)
+{
+  return __builtin_irintf (a);
+}