From: Bill Schmidt Date: Thu, 30 Jan 2014 22:36:13 +0000 (+0000) Subject: rs6000.c (rs6000_expand_vector_init): Remove unused variable "field". X-Git-Tag: releases/gcc-4.9.0~1204 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=c3e960731043e1de34786c085a34286b46d622a2;p=thirdparty%2Fgcc.git rs6000.c (rs6000_expand_vector_init): Remove unused variable "field". 2014-01-30 Bill Schmidt * config/rs6000/rs6000.c (rs6000_expand_vector_init): Remove unused variable "field". * config/rs6000/vsx.md (vsx_mergel_): Add missing DONE. (vsx_mergeh_): Likewise. * config/rs6000/altivec.md (altivec_vmrghb): Likewise. (altivec_vmrghh): Likewise. (altivec_vmrghw): Likewise. (altivec_vmrglb): Likewise. (altivec_vmrglh): Likewise. (altivec_vmrglw): Likewise. (altivec_vspltb): Add missing uses. (altivec_vsplth): Likewise. (altivec_vspltw): Likewise. (altivec_vspltsf): Likewise. From-SVN: r207326 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d78cf54375d9..8939e12abdc1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,20 @@ +2014-01-30 Bill Schmidt + + * config/rs6000/rs6000.c (rs6000_expand_vector_init): Remove + unused variable "field". + * config/rs6000/vsx.md (vsx_mergel_): Add missing DONE. + (vsx_mergeh_): Likewise. + * config/rs6000/altivec.md (altivec_vmrghb): Likewise. + (altivec_vmrghh): Likewise. + (altivec_vmrghw): Likewise. + (altivec_vmrglb): Likewise. + (altivec_vmrglh): Likewise. + (altivec_vmrglw): Likewise. + (altivec_vspltb): Add missing uses. + (altivec_vsplth): Likewise. + (altivec_vspltw): Likewise. + (altivec_vspltsf): Likewise. + 2014-01-30 Jakub Jelinek PR target/59923 diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index aacd3fbc0d6f..7e92d06888f4 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -871,6 +871,7 @@ x = gen_rtx_VEC_SELECT (V16QImode, x, gen_rtx_PARALLEL (VOIDmode, v)); emit_insn (gen_rtx_SET (VOIDmode, operands[0], x)); + DONE; }) (define_insn "*altivec_vmrghb_internal" @@ -930,6 +931,7 @@ x = gen_rtx_VEC_SELECT (V8HImode, x, gen_rtx_PARALLEL (VOIDmode, v)); emit_insn (gen_rtx_SET (VOIDmode, operands[0], x)); + DONE; }) (define_insn "*altivec_vmrghh_internal" @@ -983,6 +985,7 @@ x = gen_rtx_VEC_SELECT (V4SImode, x, gen_rtx_PARALLEL (VOIDmode, v)); emit_insn (gen_rtx_SET (VOIDmode, operands[0], x)); + DONE; }) (define_insn "*altivec_vmrghw_internal" @@ -1057,6 +1060,7 @@ x = gen_rtx_VEC_SELECT (V16QImode, x, gen_rtx_PARALLEL (VOIDmode, v)); emit_insn (gen_rtx_SET (VOIDmode, operands[0], x)); + DONE; }) (define_insn "*altivec_vmrglb_internal" @@ -1116,6 +1120,7 @@ x = gen_rtx_VEC_SELECT (V8HImode, x, gen_rtx_PARALLEL (VOIDmode, v)); emit_insn (gen_rtx_SET (VOIDmode, operands[0], x)); + DONE; }) (define_insn "*altivec_vmrglh_internal" @@ -1169,6 +1174,7 @@ x = gen_rtx_VEC_SELECT (V4SImode, x, gen_rtx_PARALLEL (VOIDmode, v)); emit_insn (gen_rtx_SET (VOIDmode, operands[0], x)); + DONE; }) (define_insn "*altivec_vmrglw_internal" @@ -1601,9 +1607,9 @@ [(set_attr "type" "veccomplex")]) (define_expand "altivec_vspltb" - [(match_operand:V16QI 0 "register_operand" "") - (match_operand:V16QI 1 "register_operand" "") - (match_operand:QI 2 "u5bit_cint_operand" "")] + [(use (match_operand:V16QI 0 "register_operand" "")) + (use (match_operand:V16QI 1 "register_operand" "")) + (use (match_operand:QI 2 "u5bit_cint_operand" ""))] "TARGET_ALTIVEC" { rtvec v; @@ -1649,9 +1655,9 @@ [(set_attr "type" "vecperm")]) (define_expand "altivec_vsplth" - [(match_operand:V8HI 0 "register_operand" "") - (match_operand:V8HI 1 "register_operand" "") - (match_operand:QI 2 "u5bit_cint_operand" "")] + [(use (match_operand:V8HI 0 "register_operand" "")) + (use (match_operand:V8HI 1 "register_operand" "")) + (use (match_operand:QI 2 "u5bit_cint_operand" ""))] "TARGET_ALTIVEC" { rtvec v; @@ -1697,9 +1703,9 @@ [(set_attr "type" "vecperm")]) (define_expand "altivec_vspltw" - [(match_operand:V4SI 0 "register_operand" "") - (match_operand:V4SI 1 "register_operand" "") - (match_operand:QI 2 "u5bit_cint_operand" "")] + [(use (match_operand:V4SI 0 "register_operand" "")) + (use (match_operand:V4SI 1 "register_operand" "")) + (use (match_operand:QI 2 "u5bit_cint_operand" ""))] "TARGET_ALTIVEC" { rtvec v; @@ -1745,9 +1751,9 @@ [(set_attr "type" "vecperm")]) (define_expand "altivec_vspltsf" - [(match_operand:V4SF 0 "register_operand" "") - (match_operand:V4SF 1 "register_operand" "") - (match_operand:QI 2 "u5bit_cint_operand" "")] + [(use (match_operand:V4SF 0 "register_operand" "")) + (use (match_operand:V4SF 1 "register_operand" "")) + (use (match_operand:QI 2 "u5bit_cint_operand" ""))] "TARGET_ALTIVEC" { rtvec v; diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index ec5f5bf1beab..0bd92d435223 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -5511,7 +5511,6 @@ rs6000_expand_vector_init (rtx target, rtx vals) of 64-bit items is not supported on Altivec. */ if (all_same && GET_MODE_SIZE (inner_mode) <= 4) { - rtx field; mem = assign_stack_temp (mode, GET_MODE_SIZE (inner_mode)); emit_move_insn (adjust_address_nv (mem, inner_mode, 0), XVECEXP (vals, 0, 0)); diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index c6d558ad6157..d0fc8cb7c9b8 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -1701,6 +1701,7 @@ x = gen_rtx_VEC_SELECT (mode, x, gen_rtx_PARALLEL (VOIDmode, v)); emit_insn (gen_rtx_SET (VOIDmode, operands[0], x)); + DONE; }) (define_expand "vsx_mergeh_" @@ -1726,6 +1727,7 @@ x = gen_rtx_VEC_SELECT (mode, x, gen_rtx_PARALLEL (VOIDmode, v)); emit_insn (gen_rtx_SET (VOIDmode, operands[0], x)); + DONE; }) ;; V2DF/V2DI splat