From: Greg Kroah-Hartman Date: Wed, 9 Nov 2016 08:26:46 +0000 (+0100) Subject: 4.8-stable patches X-Git-Tag: v4.4.31~9 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=c47e353a4ea9403a4d70604f5e2938ef33e2d365;p=thirdparty%2Fkernel%2Fstable-queue.git 4.8-stable patches added patches: drm-dp-mst-check-peer-device-type-before-attempting-edid-read.patch drm-i915-clean-up-ddi-ddc-aux-ch-sanitation.patch drm-i915-fbc-fix-cfb-size-calculation-for-gen8.patch drm-i915-gen9-fix-ddb-partitioning-for-multi-screen-cases.patch drm-i915-gen9-fix-watermarks-when-using-the-pipe-scaler.patch drm-i915-respect-alternate_aux_channel-for-all-ddi-ports.patch drm-i915-wait-for-fences-on-new-fb-not-old.patch drm-release-reference-from-blob-lookup-after-replacing-property.patch --- diff --git a/queue-4.8/drm-dp-mst-check-peer-device-type-before-attempting-edid-read.patch b/queue-4.8/drm-dp-mst-check-peer-device-type-before-attempting-edid-read.patch new file mode 100644 index 00000000000..c74270df705 --- /dev/null +++ b/queue-4.8/drm-dp-mst-check-peer-device-type-before-attempting-edid-read.patch @@ -0,0 +1,43 @@ +From 4da5caa6a6f82cda3193bca855235b87debf78bd Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= +Date: Wed, 26 Oct 2016 12:05:55 +0300 +Subject: drm/dp/mst: Check peer device type before attempting EDID read +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Ville Syrjälä + +commit 4da5caa6a6f82cda3193bca855235b87debf78bd upstream. + +Only certain types of pdts have the DDC bus registered, so check for +that before we attempt the EDID read. Othwewise we risk playing around +with an i2c adapter that doesn't actually exist. + +Cc: Carlos Santa +Cc: Kirill A. Shutemov +Tested-by: Carlos Santa +Tested-by: Kirill A. Shutemov +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97666 +Signed-off-by: Ville Syrjälä +Signed-off-by: Daniel Vetter +Link: http://patchwork.freedesktop.org/patch/msgid/1477472755-15288-5-git-send-email-ville.syrjala@linux.intel.com +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/drm_dp_mst_topology.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/drm_dp_mst_topology.c ++++ b/drivers/gpu/drm/drm_dp_mst_topology.c +@@ -1160,7 +1160,9 @@ static void drm_dp_add_port(struct drm_d + drm_dp_put_port(port); + goto out; + } +- if (port->port_num >= DP_MST_LOGICAL_PORT_0) { ++ if ((port->pdt == DP_PEER_DEVICE_DP_LEGACY_CONV || ++ port->pdt == DP_PEER_DEVICE_SST_SINK) && ++ port->port_num >= DP_MST_LOGICAL_PORT_0) { + port->cached_edid = drm_get_edid(port->connector, &port->aux.ddc); + drm_mode_connector_set_tile_property(port->connector); + } diff --git a/queue-4.8/drm-i915-clean-up-ddi-ddc-aux-ch-sanitation.patch b/queue-4.8/drm-i915-clean-up-ddi-ddc-aux-ch-sanitation.patch new file mode 100644 index 00000000000..70ea7d923d9 --- /dev/null +++ b/queue-4.8/drm-i915-clean-up-ddi-ddc-aux-ch-sanitation.patch @@ -0,0 +1,177 @@ +From 0ce140d45a8398b501934ac289aef0eb7f47c596 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= +Date: Tue, 11 Oct 2016 20:52:47 +0300 +Subject: drm/i915: Clean up DDI DDC/AUX CH sanitation +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Ville Syrjälä + +commit 0ce140d45a8398b501934ac289aef0eb7f47c596 upstream. + +Now that we use the AUX and GMBUS assignment from VBT for all ports, +let's clean up the sanitization of the port information a bit. +Previosuly we only did this for port E, and only complained about a +non-standard assignment for the other ports. But as we know that +non-standard assignments are a fact of life, let's expand the +sanitization to all the ports. + +v2: Include a commit message, fix up the comments a bit +v3: Don't clobber other ports if the current port has no alternate aux ch/ddc pin + +Cc: Maarten Maathuis +Tested-by: Maarten Maathuis +References: https://bugs.freedesktop.org/show_bug.cgi?id=97877 +Signed-off-by: Ville Syrjälä +Link: http://patchwork.freedesktop.org/patch/msgid/1476208368-5710-4-git-send-email-ville.syrjala@linux.intel.com +Reviewed-by: Jim Bride (v2) +(cherry picked from commit 9454fa871edf15c20a0371548b3ec0d6d944a498) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_bios.c | 122 +++++++++++++++++++++++--------------- + 1 file changed, 77 insertions(+), 45 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_bios.c ++++ b/drivers/gpu/drm/i915/intel_bios.c +@@ -1031,6 +1031,77 @@ static u8 translate_iboost(u8 val) + return mapping[val]; + } + ++static void sanitize_ddc_pin(struct drm_i915_private *dev_priv, ++ enum port port) ++{ ++ const struct ddi_vbt_port_info *info = ++ &dev_priv->vbt.ddi_port_info[port]; ++ enum port p; ++ ++ if (!info->alternate_ddc_pin) ++ return; ++ ++ for_each_port_masked(p, (1 << port) - 1) { ++ struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p]; ++ ++ if (info->alternate_ddc_pin != i->alternate_ddc_pin) ++ continue; ++ ++ DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, " ++ "disabling port %c DVI/HDMI support\n", ++ port_name(p), i->alternate_ddc_pin, ++ port_name(port), port_name(p)); ++ ++ /* ++ * If we have multiple ports supposedly sharing the ++ * pin, then dvi/hdmi couldn't exist on the shared ++ * port. Otherwise they share the same ddc bin and ++ * system couldn't communicate with them separately. ++ * ++ * Due to parsing the ports in alphabetical order, ++ * a higher port will always clobber a lower one. ++ */ ++ i->supports_dvi = false; ++ i->supports_hdmi = false; ++ i->alternate_ddc_pin = 0; ++ } ++} ++ ++static void sanitize_aux_ch(struct drm_i915_private *dev_priv, ++ enum port port) ++{ ++ const struct ddi_vbt_port_info *info = ++ &dev_priv->vbt.ddi_port_info[port]; ++ enum port p; ++ ++ if (!info->alternate_aux_channel) ++ return; ++ ++ for_each_port_masked(p, (1 << port) - 1) { ++ struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p]; ++ ++ if (info->alternate_aux_channel != i->alternate_aux_channel) ++ continue; ++ ++ DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, " ++ "disabling port %c DP support\n", ++ port_name(p), i->alternate_aux_channel, ++ port_name(port), port_name(p)); ++ ++ /* ++ * If we have multiple ports supposedlt sharing the ++ * aux channel, then DP couldn't exist on the shared ++ * port. Otherwise they share the same aux channel ++ * and system couldn't communicate with them separately. ++ * ++ * Due to parsing the ports in alphabetical order, ++ * a higher port will always clobber a lower one. ++ */ ++ i->supports_dp = false; ++ i->alternate_aux_channel = 0; ++ } ++} ++ + static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port, + const struct bdb_header *bdb) + { +@@ -1105,54 +1176,15 @@ static void parse_ddi_port(struct drm_i9 + DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port)); + + if (is_dvi) { +- if (port == PORT_E) { +- info->alternate_ddc_pin = ddc_pin; +- /* if DDIE share ddc pin with other port, then +- * dvi/hdmi couldn't exist on the shared port. +- * Otherwise they share the same ddc bin and system +- * couldn't communicate with them seperately. */ +- if (ddc_pin == DDC_PIN_B) { +- dev_priv->vbt.ddi_port_info[PORT_B].supports_dvi = 0; +- dev_priv->vbt.ddi_port_info[PORT_B].supports_hdmi = 0; +- } else if (ddc_pin == DDC_PIN_C) { +- dev_priv->vbt.ddi_port_info[PORT_C].supports_dvi = 0; +- dev_priv->vbt.ddi_port_info[PORT_C].supports_hdmi = 0; +- } else if (ddc_pin == DDC_PIN_D) { +- dev_priv->vbt.ddi_port_info[PORT_D].supports_dvi = 0; +- dev_priv->vbt.ddi_port_info[PORT_D].supports_hdmi = 0; +- } +- } else if (ddc_pin == DDC_PIN_B && port != PORT_B) +- DRM_DEBUG_KMS("Unexpected DDC pin for port B\n"); +- else if (ddc_pin == DDC_PIN_C && port != PORT_C) +- DRM_DEBUG_KMS("Unexpected DDC pin for port C\n"); +- else if (ddc_pin == DDC_PIN_D && port != PORT_D) +- DRM_DEBUG_KMS("Unexpected DDC pin for port D\n"); ++ info->alternate_ddc_pin = ddc_pin; ++ ++ sanitize_ddc_pin(dev_priv, port); + } + + if (is_dp) { +- if (port == PORT_E) { +- info->alternate_aux_channel = aux_channel; +- /* if DDIE share aux channel with other port, then +- * DP couldn't exist on the shared port. Otherwise +- * they share the same aux channel and system +- * couldn't communicate with them seperately. */ +- if (aux_channel == DP_AUX_A) +- dev_priv->vbt.ddi_port_info[PORT_A].supports_dp = 0; +- else if (aux_channel == DP_AUX_B) +- dev_priv->vbt.ddi_port_info[PORT_B].supports_dp = 0; +- else if (aux_channel == DP_AUX_C) +- dev_priv->vbt.ddi_port_info[PORT_C].supports_dp = 0; +- else if (aux_channel == DP_AUX_D) +- dev_priv->vbt.ddi_port_info[PORT_D].supports_dp = 0; +- } +- else if (aux_channel == DP_AUX_A && port != PORT_A) +- DRM_DEBUG_KMS("Unexpected AUX channel for port A\n"); +- else if (aux_channel == DP_AUX_B && port != PORT_B) +- DRM_DEBUG_KMS("Unexpected AUX channel for port B\n"); +- else if (aux_channel == DP_AUX_C && port != PORT_C) +- DRM_DEBUG_KMS("Unexpected AUX channel for port C\n"); +- else if (aux_channel == DP_AUX_D && port != PORT_D) +- DRM_DEBUG_KMS("Unexpected AUX channel for port D\n"); ++ info->alternate_aux_channel = aux_channel; ++ ++ sanitize_aux_ch(dev_priv, port); + } + + if (bdb->version >= 158) { diff --git a/queue-4.8/drm-i915-fbc-fix-cfb-size-calculation-for-gen8.patch b/queue-4.8/drm-i915-fbc-fix-cfb-size-calculation-for-gen8.patch new file mode 100644 index 00000000000..a422980c144 --- /dev/null +++ b/queue-4.8/drm-i915-fbc-fix-cfb-size-calculation-for-gen8.patch @@ -0,0 +1,60 @@ +From e3b9e6e3a989904ae062e7a48a9431edc837ea6b Mon Sep 17 00:00:00 2001 +From: Paulo Zanoni +Date: Fri, 21 Oct 2016 13:55:45 -0200 +Subject: drm/i915/fbc: fix CFB size calculation for gen8+ +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Paulo Zanoni + +commit e3b9e6e3a989904ae062e7a48a9431edc837ea6b upstream. + +Broadwell and newer actually compress up to 2560 lines instead of 2048 +(as documented in the FBC_CTL page). If we don't take this into +consideration we end up reserving too little stolen memory for the +CFB, so we may allocate something else (such as a ring) right after +what we reserved, and the hardware will overwrite it with the contents +of the CFB when FBC is active, causing GPU hangs. Another possibility +is that the CFB may be allocated at the very end of the available +space, so the CFB will overlap the reserved stolen area, leading to +FIFO underruns. + +This bug has always been a problem on BDW (the only affected platform +where FBC is enabled by default), but it's much easier to reproduce +since the following commit: + commit c58b735fc762e891481e92af7124b85cb0a51fce + Author: Chris Wilson + Date: Thu Aug 18 17:16:57 2016 +0100 + drm/i915: Allocate rings from stolen + +Of course, you can only reproduce the bug if your screen is taller +than 2048 lines. + +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98213 +Fixes: a98ee79317b4 ("drm/i915/fbc: enable FBC by default on HSW and BDW") +Signed-off-by: Paulo Zanoni +Reviewed-by: Ville Syrjälä +Link: http://patchwork.freedesktop.org/patch/msgid/1477065346-13736-1-git-send-email-paulo.r.zanoni@intel.com +(cherry picked from commit 79f2624b1b9f776b173b41d743fb3dd7374b3827) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_fbc.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/i915/intel_fbc.c ++++ b/drivers/gpu/drm/i915/intel_fbc.c +@@ -104,8 +104,10 @@ static int intel_fbc_calculate_cfb_size( + int lines; + + intel_fbc_get_plane_source_size(cache, NULL, &lines); +- if (INTEL_INFO(dev_priv)->gen >= 7) ++ if (INTEL_GEN(dev_priv) == 7) + lines = min(lines, 2048); ++ else if (INTEL_GEN(dev_priv) >= 8) ++ lines = min(lines, 2560); + + /* Hardware needs the full buffer stride, not just the active area. */ + return lines * cache->fb.stride; diff --git a/queue-4.8/drm-i915-gen9-fix-ddb-partitioning-for-multi-screen-cases.patch b/queue-4.8/drm-i915-gen9-fix-ddb-partitioning-for-multi-screen-cases.patch new file mode 100644 index 00000000000..8679e4e6705 --- /dev/null +++ b/queue-4.8/drm-i915-gen9-fix-ddb-partitioning-for-multi-screen-cases.patch @@ -0,0 +1,80 @@ +From 01c72d6c17dc524f04d4dbe361d214e423b35457 Mon Sep 17 00:00:00 2001 +From: Paulo Zanoni +Date: Tue, 4 Oct 2016 14:37:32 -0300 +Subject: drm/i915/gen9: fix DDB partitioning for multi-screen cases + +From: Paulo Zanoni + +commit 01c72d6c17dc524f04d4dbe361d214e423b35457 upstream. + +With the previous code we were only recomputing the DDB partitioning +for the CRTCs included in the atomic commit, so any other active CRTCs +would end up having their DDB registers zeroed. In this patch we make +sure that the computed state starts as a copy of the current +partitioning, and then we only zero the DDBs that we're actually +going to recompute. + +How to reproduce the bug: + 1 - Enable the primary plane on pipe A + 2 - Enable the primary plane on pipe B + 3 - Enable the cursor or sprite plane on pipe A + +Step 3 will zero the DDB partitioning for pipe B since it's not +included in the commit that enabled the cursor or sprite for pipe A. + +I expect this to fix many FIFO underrun problems on gen9+. + +v2: + - Mention the cursor on the steps to reproduce the problem (Paulo). + - Add Testcase tag provided by Maarten (Maarten). + +Testcase: kms_cursor_legacy.cursorA-vs-flipB-atomic-transitions +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96226 +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96828 +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97450 +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97596 +Bugzilla: https://www.phoronix.com/scan.php?page=news_item&px=Intel-Skylake-Multi-Screen-Woes +Signed-off-by: Paulo Zanoni +Reviewed-by: Lyude +Link: http://patchwork.freedesktop.org/patch/msgid/1475602652-17326-1-git-send-email-paulo.r.zanoni@intel.com +(cherry picked from commit 5a920b85f2c6e3fd7d9dd9bb3f3345e9085e2360) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_pm.c | 12 ++++++++++-- + 1 file changed, 10 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -3363,13 +3363,15 @@ skl_allocate_pipe_ddb(struct intel_crtc_ + int num_active; + int id, i; + ++ /* Clear the partitioning for disabled planes. */ ++ memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe])); ++ memset(ddb->y_plane[pipe], 0, sizeof(ddb->y_plane[pipe])); ++ + if (WARN_ON(!state)) + return 0; + + if (!cstate->base.active) { + ddb->pipe[pipe].start = ddb->pipe[pipe].end = 0; +- memset(ddb->plane[pipe], 0, sizeof(ddb->plane[pipe])); +- memset(ddb->y_plane[pipe], 0, sizeof(ddb->y_plane[pipe])); + return 0; + } + +@@ -4051,6 +4053,12 @@ skl_compute_ddb(struct drm_atomic_state + intel_state->wm_results.dirty_pipes = ~0; + } + ++ /* ++ * We're not recomputing for the pipes not included in the commit, so ++ * make sure we start with the current state. ++ */ ++ memcpy(ddb, &dev_priv->wm.skl_hw.ddb, sizeof(*ddb)); ++ + for_each_intel_crtc_mask(dev, intel_crtc, realloc_pipes) { + struct intel_crtc_state *cstate; + diff --git a/queue-4.8/drm-i915-gen9-fix-watermarks-when-using-the-pipe-scaler.patch b/queue-4.8/drm-i915-gen9-fix-watermarks-when-using-the-pipe-scaler.patch new file mode 100644 index 00000000000..84ab9951b86 --- /dev/null +++ b/queue-4.8/drm-i915-gen9-fix-watermarks-when-using-the-pipe-scaler.patch @@ -0,0 +1,64 @@ +From 5e33791e1f27c3207e7b44071e7c94a487d1eb39 Mon Sep 17 00:00:00 2001 +From: Paulo Zanoni +Date: Fri, 7 Oct 2016 17:28:57 -0300 +Subject: drm/i915/gen9: fix watermarks when using the pipe scaler + +From: Paulo Zanoni + +commit 5e33791e1f27c3207e7b44071e7c94a487d1eb39 upstream. + +Luckily, the necessary adjustments for when we're using the scaler are +exactly the same as the ones needed on ILK+, so just reuse the +function we already have. + +v2: Invert the patch order so stable backports get easier. + +Signed-off-by: Paulo Zanoni +Reviewed-by: Matt Roper +Link: http://patchwork.freedesktop.org/patch/msgid/1475872138-16194-1-git-send-email-paulo.r.zanoni@intel.com +(cherry picked from commit cfd7e3a20251b9ac95651d64556f87f86128a966) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_pm.c | 12 +++--------- + 1 file changed, 3 insertions(+), 9 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -3471,12 +3471,6 @@ skl_allocate_pipe_ddb(struct intel_crtc_ + return 0; + } + +-static uint32_t skl_pipe_pixel_rate(const struct intel_crtc_state *config) +-{ +- /* TODO: Take into account the scalers once we support them */ +- return config->base.adjusted_mode.crtc_clock; +-} +- + /* + * The max latency should be 257 (max the punit can code is 255 and we add 2us + * for the read latency) and cpp should always be <= 8, so that +@@ -3527,7 +3521,7 @@ static uint32_t skl_adjusted_plane_pixel + * Adjusted plane pixel rate is just the pipe's adjusted pixel rate + * with additional adjustments for plane-specific scaling. + */ +- adjusted_pixel_rate = skl_pipe_pixel_rate(cstate); ++ adjusted_pixel_rate = ilk_pipe_pixel_rate(cstate); + downscale_amount = skl_plane_downscale_amount(pstate); + + pixel_rate = adjusted_pixel_rate * downscale_amount >> 16; +@@ -3739,11 +3733,11 @@ skl_compute_linetime_wm(struct intel_crt + if (!cstate->base.active) + return 0; + +- if (WARN_ON(skl_pipe_pixel_rate(cstate) == 0)) ++ if (WARN_ON(ilk_pipe_pixel_rate(cstate) == 0)) + return 0; + + return DIV_ROUND_UP(8 * cstate->base.adjusted_mode.crtc_htotal * 1000, +- skl_pipe_pixel_rate(cstate)); ++ ilk_pipe_pixel_rate(cstate)); + } + + static void skl_compute_transition_wm(struct intel_crtc_state *cstate, diff --git a/queue-4.8/drm-i915-respect-alternate_aux_channel-for-all-ddi-ports.patch b/queue-4.8/drm-i915-respect-alternate_aux_channel-for-all-ddi-ports.patch new file mode 100644 index 00000000000..28c611fb915 --- /dev/null +++ b/queue-4.8/drm-i915-respect-alternate_aux_channel-for-all-ddi-ports.patch @@ -0,0 +1,146 @@ +From 198c5ee3c60169f8b64bcd330a34593be80699aa Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= +Date: Tue, 11 Oct 2016 20:52:45 +0300 +Subject: drm/i915: Respect alternate_aux_channel for all DDI ports +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Ville Syrjälä + +commit 198c5ee3c60169f8b64bcd330a34593be80699aa upstream. + +The VBT provides the platform a way to mix and match the DDI ports vs. +AUX channels. Currently we only trust the VBT for DDI E, which has no +corresponding AUX channel of its own. However it is possible that some +board might use some non-standard DDI vs. AUX port routing even for +the other ports. Perhaps for signal routing reasons or something, +So let's generalize this and trust the VBT for all ports. + +For now we'll limit this to DDI platforms, as we trust the VBT a bit +more there anyway when it comes to the DDI ports. I've structured +the code in a way that would allow us to easily expand this to +other platforms as well, by simply filling in the ddi_port_info. + +v2: Drop whitespace changes, keep MISSING_CASE() for unknown + aux ch assignment, include a commit message, include debug + message during init + +Cc: Maarten Maathuis +Tested-by: Maarten Maathuis +References: https://bugs.freedesktop.org/show_bug.cgi?id=97877 +Signed-off-by: Ville Syrjälä +Link: http://patchwork.freedesktop.org/patch/msgid/1476208368-5710-2-git-send-email-ville.syrjala@linux.intel.com +Reviewed-by: Jim Bride +(cherry picked from commit 8f7ce038f1178057733b7e765bf9160a2f9be14b) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_dp.c | 71 ++++++++++++++++++++++------------------ + 1 file changed, 40 insertions(+), 31 deletions(-) + +--- a/drivers/gpu/drm/i915/intel_dp.c ++++ b/drivers/gpu/drm/i915/intel_dp.c +@@ -1090,6 +1090,44 @@ intel_dp_aux_transfer(struct drm_dp_aux + return ret; + } + ++static enum port intel_aux_port(struct drm_i915_private *dev_priv, ++ enum port port) ++{ ++ const struct ddi_vbt_port_info *info = ++ &dev_priv->vbt.ddi_port_info[port]; ++ enum port aux_port; ++ ++ if (!info->alternate_aux_channel) { ++ DRM_DEBUG_KMS("using AUX %c for port %c (platform default)\n", ++ port_name(port), port_name(port)); ++ return port; ++ } ++ ++ switch (info->alternate_aux_channel) { ++ case DP_AUX_A: ++ aux_port = PORT_A; ++ break; ++ case DP_AUX_B: ++ aux_port = PORT_B; ++ break; ++ case DP_AUX_C: ++ aux_port = PORT_C; ++ break; ++ case DP_AUX_D: ++ aux_port = PORT_D; ++ break; ++ default: ++ MISSING_CASE(info->alternate_aux_channel); ++ aux_port = PORT_A; ++ break; ++ } ++ ++ DRM_DEBUG_KMS("using AUX %c for port %c (VBT)\n", ++ port_name(aux_port), port_name(port)); ++ ++ return aux_port; ++} ++ + static i915_reg_t g4x_aux_ctl_reg(struct drm_i915_private *dev_priv, + enum port port) + { +@@ -1150,36 +1188,9 @@ static i915_reg_t ilk_aux_data_reg(struc + } + } + +-/* +- * On SKL we don't have Aux for port E so we rely +- * on VBT to set a proper alternate aux channel. +- */ +-static enum port skl_porte_aux_port(struct drm_i915_private *dev_priv) +-{ +- const struct ddi_vbt_port_info *info = +- &dev_priv->vbt.ddi_port_info[PORT_E]; +- +- switch (info->alternate_aux_channel) { +- case DP_AUX_A: +- return PORT_A; +- case DP_AUX_B: +- return PORT_B; +- case DP_AUX_C: +- return PORT_C; +- case DP_AUX_D: +- return PORT_D; +- default: +- MISSING_CASE(info->alternate_aux_channel); +- return PORT_A; +- } +-} +- + static i915_reg_t skl_aux_ctl_reg(struct drm_i915_private *dev_priv, + enum port port) + { +- if (port == PORT_E) +- port = skl_porte_aux_port(dev_priv); +- + switch (port) { + case PORT_A: + case PORT_B: +@@ -1195,9 +1206,6 @@ static i915_reg_t skl_aux_ctl_reg(struct + static i915_reg_t skl_aux_data_reg(struct drm_i915_private *dev_priv, + enum port port, int index) + { +- if (port == PORT_E) +- port = skl_porte_aux_port(dev_priv); +- + switch (port) { + case PORT_A: + case PORT_B: +@@ -1235,7 +1243,8 @@ static i915_reg_t intel_aux_data_reg(str + static void intel_aux_reg_init(struct intel_dp *intel_dp) + { + struct drm_i915_private *dev_priv = to_i915(intel_dp_to_dev(intel_dp)); +- enum port port = dp_to_dig_port(intel_dp)->port; ++ enum port port = intel_aux_port(dev_priv, ++ dp_to_dig_port(intel_dp)->port); + int i; + + intel_dp->aux_ch_ctl_reg = intel_aux_ctl_reg(dev_priv, port); diff --git a/queue-4.8/drm-i915-wait-for-fences-on-new-fb-not-old.patch b/queue-4.8/drm-i915-wait-for-fences-on-new-fb-not-old.patch new file mode 100644 index 00000000000..b3051b43366 --- /dev/null +++ b/queue-4.8/drm-i915-wait-for-fences-on-new-fb-not-old.patch @@ -0,0 +1,38 @@ +From 1fb3672eaf6ec95fb34c22734feffd6041531c5b Mon Sep 17 00:00:00 2001 +From: Daniel Stone +Date: Fri, 21 Oct 2016 15:44:54 +0100 +Subject: drm: i915: Wait for fences on new fb, not old + +From: Daniel Stone + +commit 1fb3672eaf6ec95fb34c22734feffd6041531c5b upstream. + +The previous code would wait for fences on the framebuffer from the old +plane state to complete, rather than the new, so you would see tearing +everywhere. Fix this to wait on the new state before we make it active. + +Signed-off-by: Daniel Stone +Fixes: 94f050246b42 ("drm/i915: nonblocking commit") +Cc: Daniel Vetter +Cc: Maarten Lankhorst +Signed-off-by: Daniel Vetter +Link: http://patchwork.freedesktop.org/patch/msgid/20161021144454.6288-1-daniels@collabora.com +(cherry picked from commit 2d2c5ad83f772d7d7b0bb8348ecea42e88f89ab0) +Signed-off-by: Jani Nikula +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/i915/intel_display.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -13834,7 +13834,7 @@ static void intel_atomic_commit_tail(str + + for_each_plane_in_state(state, plane, plane_state, i) { + struct intel_plane_state *intel_plane_state = +- to_intel_plane_state(plane_state); ++ to_intel_plane_state(plane->state); + + if (!intel_plane_state->wait_req) + continue; diff --git a/queue-4.8/drm-release-reference-from-blob-lookup-after-replacing-property.patch b/queue-4.8/drm-release-reference-from-blob-lookup-after-replacing-property.patch new file mode 100644 index 00000000000..a6e05026dbe --- /dev/null +++ b/queue-4.8/drm-release-reference-from-blob-lookup-after-replacing-property.patch @@ -0,0 +1,62 @@ +From cac5fcedaabdadf150c8a9be9fee76defc8ba444 Mon Sep 17 00:00:00 2001 +From: Felix Monninger +Date: Tue, 25 Oct 2016 22:28:08 +0100 +Subject: drm: Release reference from blob lookup after replacing property +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Felix Monninger + +commit cac5fcedaabdadf150c8a9be9fee76defc8ba444 upstream. + +drm_property_lookup_blob() returns a reference to the returned blob, and +drm_atomic_replace_property_blob() takes a references to the blob it +stores, so afterwards we are left owning a reference to the new_blob that +we never release, and thus leak memory every time we update a property +such as during drm_atomic_helper_legacy_gamma_set(). + +v2: update credentials, drm_property_unreference_blob() is NULL safe and +NULL is passed consistently to it throughout drm_atomic.c so do so here. + +Reported-by: Felix Monninger +Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98420 +Signed-off-by: Felix Monninger +Signed-off-by: Chris Wilson +Fixes: 5488dc16fde7 ("drm: introduce pipe color correction properties") +Reviewed-by: Ville Syrjälä +Signed-off-by: Daniel Vetter +Link: http://patchwork.freedesktop.org/patch/msgid/20161025212808.3908-1-chris@chris-wilson.co.uk +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/drm_atomic.c | 9 ++++++--- + 1 file changed, 6 insertions(+), 3 deletions(-) + +--- a/drivers/gpu/drm/drm_atomic.c ++++ b/drivers/gpu/drm/drm_atomic.c +@@ -420,18 +420,21 @@ drm_atomic_replace_property_blob_from_id + ssize_t expected_size, + bool *replaced) + { +- struct drm_device *dev = crtc->dev; + struct drm_property_blob *new_blob = NULL; + + if (blob_id != 0) { +- new_blob = drm_property_lookup_blob(dev, blob_id); ++ new_blob = drm_property_lookup_blob(crtc->dev, blob_id); + if (new_blob == NULL) + return -EINVAL; +- if (expected_size > 0 && expected_size != new_blob->length) ++ ++ if (expected_size > 0 && expected_size != new_blob->length) { ++ drm_property_unreference_blob(new_blob); + return -EINVAL; ++ } + } + + drm_atomic_replace_property_blob(blob, new_blob, replaced); ++ drm_property_unreference_blob(new_blob); + + return 0; + } diff --git a/queue-4.8/series b/queue-4.8/series index 5e164bc4ae0..7ae6d47cbb3 100644 --- a/queue-4.8/series +++ b/queue-4.8/series @@ -111,3 +111,11 @@ drm-nouveau-acpi-fix-check-for-power-resources-support.patch drm-fb-helper-don-t-call-dirty-callback-for-untouched-clips.patch drm-fb-helper-fix-connector-ref-leak-on-error.patch drm-fb-helper-keep-references-for-the-current-set-of-used-connectors.patch +drm-i915-gen9-fix-ddb-partitioning-for-multi-screen-cases.patch +drm-i915-gen9-fix-watermarks-when-using-the-pipe-scaler.patch +drm-dp-mst-check-peer-device-type-before-attempting-edid-read.patch +drm-release-reference-from-blob-lookup-after-replacing-property.patch +drm-i915-respect-alternate_aux_channel-for-all-ddi-ports.patch +drm-i915-clean-up-ddi-ddc-aux-ch-sanitation.patch +drm-i915-fbc-fix-cfb-size-calculation-for-gen8.patch +drm-i915-wait-for-fences-on-new-fb-not-old.patch