From: Qiuxu Zhuo Date: Wed, 26 Jun 2019 06:16:38 +0000 (+0800) Subject: EDAC, i10nm: Check ECC enabling status per channel X-Git-Tag: v5.3-rc1~171^2~2 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=c4a1dd9e83ceceef6ffba82b8b274ab9b929ea14;p=thirdparty%2Flinux.git EDAC, i10nm: Check ECC enabling status per channel The i10nm_edac only checks the ECC enabling status for the first channel of the memory controller. If there aren't memory DIMMs populated on the first channel, but at least one DIMM populated on the second channel, it will wrongly report that the ECC for the memory controller is disabled that fails to load the i10nm_edac driver. Fix it by checking ECC enabling status per channel. [Tony: Also report which channel has ECC disabled] Signed-off-by: Qiuxu Zhuo Signed-off-by: Tony Luck --- diff --git a/drivers/edac/i10nm_base.c b/drivers/edac/i10nm_base.c index 48c6cecc96833..72cc20a90ac1b 100644 --- a/drivers/edac/i10nm_base.c +++ b/drivers/edac/i10nm_base.c @@ -168,9 +168,9 @@ static int i10nm_get_dimm_config(struct mem_ctl_info *mci) ndimms += skx_get_nvdimm_info(dimm, imc, i, j, EDAC_MOD_STR); } - if (ndimms && !i10nm_check_ecc(imc, 0)) { - i10nm_printk(KERN_ERR, "ECC is disabled on imc %d\n", - imc->mc); + if (ndimms && !i10nm_check_ecc(imc, i)) { + i10nm_printk(KERN_ERR, "ECC is disabled on imc %d channel %d\n", + imc->mc, i); return -ENODEV; } }