From: yang.zhang <yang.zhang@hexintek.com>
Date: Fri, 7 Jul 2023 03:23:06 +0000 (+0800)
Subject: target/riscv KVM_RISCV_SET_TIMER macro is not configured correctly
X-Git-Tag: v8.1.0-rc0~17^2~22
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=c5cc248b478bc21e50845ba6b2414c4a688e195f;p=thirdparty%2Fqemu.git

target/riscv KVM_RISCV_SET_TIMER macro is not configured correctly

Should set/get riscv all reg timer,i.e, time/compare/frequency/state.

Signed-off-by: Yang Zhang <yang.zhang@hexintek.com>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1688
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-Id: <20230707032306.4606-1-gaoshanliukou@163.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---

diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
index 0f932a5b966..c3976a588d0 100644
--- a/target/riscv/kvm.c
+++ b/target/riscv/kvm.c
@@ -99,7 +99,7 @@ static uint64_t kvm_riscv_reg_id(CPURISCVState *env, uint64_t type,
 
 #define KVM_RISCV_SET_TIMER(cs, env, name, reg) \
     do { \
-        int ret = kvm_set_one_reg(cs, RISCV_TIMER_REG(env, time), &reg); \
+        int ret = kvm_set_one_reg(cs, RISCV_TIMER_REG(env, name), &reg); \
         if (ret) { \
             abort(); \
         } \