From: Richard Biener Date: Wed, 1 Oct 2025 09:26:45 +0000 (+0200) Subject: tree-optimization/122110 - do not reject all bit-precision reductions X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=c6865e7e15bc9a1337df00d2ca03604e1712a2dd;p=thirdparty%2Fgcc.git tree-optimization/122110 - do not reject all bit-precision reductions We can handle bitwise-operation reductions and reductions on mask vectors just fine. PR tree-optimization/122110 * tree-vect-loop.cc (vectorizable_reduction): Relax restriction to mode-precision operations. --- diff --git a/gcc/tree-vect-loop.cc b/gcc/tree-vect-loop.cc index 18360375e29..1d549e4a03e 100644 --- a/gcc/tree-vect-loop.cc +++ b/gcc/tree-vect-loop.cc @@ -7187,7 +7187,11 @@ vectorizable_reduction (loop_vec_info loop_vinfo, return false; /* Do not try to vectorize bit-precision reductions. */ - if (!type_has_mode_precision_p (op.type)) + if (!VECTOR_BOOLEAN_TYPE_P (vectype_out) + && !type_has_mode_precision_p (op.type) + && op.code != BIT_AND_EXPR + && op.code != BIT_IOR_EXPR + && op.code != BIT_XOR_EXPR) return false; /* Lane-reducing ops also never can be used in a SLP reduction group