From: Greg Kroah-Hartman Date: Fri, 23 Oct 2015 16:34:28 +0000 (-0700) Subject: 4.2-stable patches X-Git-Tag: v3.14.56~7 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=c706ecafa6442736758786b91da5bae7c0f281fe;p=thirdparty%2Fkernel%2Fstable-queue.git 4.2-stable patches added patches: dm-thin-fix-missing-pool-reference-count-decrement-in-pool_ctr-error-path.patch drm-amdgpu-add-pm-sysfs-files-late.patch drm-amdgpu-check-before-checking-pci-bridge-registers.patch drm-amdgpu-fix-num_crtc-on-cz.patch drm-amdgpu-keep-the-pflip-interrupts-always-enabled-v7.patch drm-dp-mst-make-mst-i2c-transfer-code-more-robust.patch drm-radeon-add-pm-sysfs-files-late.patch drm-radeon-attach-tile-property-to-mst-connector.patch --- diff --git a/queue-4.2/dm-thin-fix-missing-pool-reference-count-decrement-in-pool_ctr-error-path.patch b/queue-4.2/dm-thin-fix-missing-pool-reference-count-decrement-in-pool_ctr-error-path.patch new file mode 100644 index 00000000000..140ea776485 --- /dev/null +++ b/queue-4.2/dm-thin-fix-missing-pool-reference-count-decrement-in-pool_ctr-error-path.patch @@ -0,0 +1,28 @@ +From ba30670f4d5292c4e7f7980bbd5071f7c4794cdd Mon Sep 17 00:00:00 2001 +From: Mike Snitzer +Date: Tue, 13 Oct 2015 12:04:28 -0400 +Subject: dm thin: fix missing pool reference count decrement in pool_ctr error path + +From: Mike Snitzer + +commit ba30670f4d5292c4e7f7980bbd5071f7c4794cdd upstream. + +Fixes: ac8c3f3df ("dm thin: generate event when metadata threshold passed") +Signed-off-by: Mike Snitzer +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/md/dm-thin.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/md/dm-thin.c ++++ b/drivers/md/dm-thin.c +@@ -3255,7 +3255,7 @@ static int pool_ctr(struct dm_target *ti + metadata_low_callback, + pool); + if (r) +- goto out_free_pt; ++ goto out_flags_changed; + + pt->callbacks.congested_fn = pool_is_congested; + dm_table_add_target_callbacks(ti->table, &pt->callbacks); diff --git a/queue-4.2/drm-amdgpu-add-pm-sysfs-files-late.patch b/queue-4.2/drm-amdgpu-add-pm-sysfs-files-late.patch new file mode 100644 index 00000000000..21d9c86657a --- /dev/null +++ b/queue-4.2/drm-amdgpu-add-pm-sysfs-files-late.patch @@ -0,0 +1,98 @@ +From fa022a9b65d2886486a022fd66b20c823cd76ad9 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Wed, 30 Sep 2015 17:05:40 -0400 +Subject: drm/amdgpu: add pm sysfs files late + +From: Alex Deucher + +commit fa022a9b65d2886486a022fd66b20c823cd76ad9 upstream. + +They were added relatively early in the driver init process +which meant that in some cases the driver was not finished +initializing before external tools tried to use them which +could result in a crash depending on the timing. + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/amd/amdgpu/ci_dpm.c | 8 +++++--- + drivers/gpu/drm/amd/amdgpu/cz_dpm.c | 10 ++++++---- + drivers/gpu/drm/amd/amdgpu/kv_dpm.c | 9 ++++++--- + 3 files changed, 17 insertions(+), 10 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c ++++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c +@@ -6185,6 +6185,11 @@ static int ci_dpm_late_init(void *handle + if (!amdgpu_dpm) + return 0; + ++ /* init the sysfs and debugfs files late */ ++ ret = amdgpu_pm_sysfs_init(adev); ++ if (ret) ++ return ret; ++ + ret = ci_set_temperature_range(adev); + if (ret) + return ret; +@@ -6232,9 +6237,6 @@ static int ci_dpm_sw_init(void *handle) + adev->pm.dpm.current_ps = adev->pm.dpm.requested_ps = adev->pm.dpm.boot_ps; + if (amdgpu_dpm == 1) + amdgpu_pm_print_power_states(adev); +- ret = amdgpu_pm_sysfs_init(adev); +- if (ret) +- goto dpm_failed; + mutex_unlock(&adev->pm.mutex); + DRM_INFO("amdgpu: dpm initialized\n"); + +--- a/drivers/gpu/drm/amd/amdgpu/cz_dpm.c ++++ b/drivers/gpu/drm/amd/amdgpu/cz_dpm.c +@@ -596,6 +596,12 @@ static int cz_dpm_late_init(void *handle + struct amdgpu_device *adev = (struct amdgpu_device *)handle; + + if (amdgpu_dpm) { ++ int ret; ++ /* init the sysfs and debugfs files late */ ++ ret = amdgpu_pm_sysfs_init(adev); ++ if (ret) ++ return ret; ++ + /* powerdown unused blocks for now */ + cz_dpm_powergate_uvd(adev, true); + cz_dpm_powergate_vce(adev, true); +@@ -632,10 +638,6 @@ static int cz_dpm_sw_init(void *handle) + if (amdgpu_dpm == 1) + amdgpu_pm_print_power_states(adev); + +- ret = amdgpu_pm_sysfs_init(adev); +- if (ret) +- goto dpm_init_failed; +- + mutex_unlock(&adev->pm.mutex); + DRM_INFO("amdgpu: dpm initialized\n"); + +--- a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c ++++ b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c +@@ -2995,6 +2995,12 @@ static int kv_dpm_late_init(void *handle + { + /* powerdown unused blocks for now */ + struct amdgpu_device *adev = (struct amdgpu_device *)handle; ++ int ret; ++ ++ /* init the sysfs and debugfs files late */ ++ ret = amdgpu_pm_sysfs_init(adev); ++ if (ret) ++ return ret; + + kv_dpm_powergate_acp(adev, true); + kv_dpm_powergate_samu(adev, true); +@@ -3038,9 +3044,6 @@ static int kv_dpm_sw_init(void *handle) + adev->pm.dpm.current_ps = adev->pm.dpm.requested_ps = adev->pm.dpm.boot_ps; + if (amdgpu_dpm == 1) + amdgpu_pm_print_power_states(adev); +- ret = amdgpu_pm_sysfs_init(adev); +- if (ret) +- goto dpm_failed; + mutex_unlock(&adev->pm.mutex); + DRM_INFO("amdgpu: dpm initialized\n"); + diff --git a/queue-4.2/drm-amdgpu-check-before-checking-pci-bridge-registers.patch b/queue-4.2/drm-amdgpu-check-before-checking-pci-bridge-registers.patch new file mode 100644 index 00000000000..c38b435f58c --- /dev/null +++ b/queue-4.2/drm-amdgpu-check-before-checking-pci-bridge-registers.patch @@ -0,0 +1,50 @@ +From e79d5c0870eedce94e5f5a2ffab30511e48fa144 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Tue, 6 Oct 2015 09:38:45 -0400 +Subject: drm/amdgpu: check before checking pci bridge registers +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Alex Deucher + +commit e79d5c0870eedce94e5f5a2ffab30511e48fa144 upstream. + +Make sure we are not the root device before attempting to +read the pcie bridge registers to check the pcie gen speeed. + +Fixes a crash when the device is passed through to a VM. + +Reviewed-by: Christian König +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/amd/amdgpu/cik.c | 3 +++ + drivers/gpu/drm/amd/amdgpu/vi.c | 3 +++ + 2 files changed, 6 insertions(+) + +--- a/drivers/gpu/drm/amd/amdgpu/cik.c ++++ b/drivers/gpu/drm/amd/amdgpu/cik.c +@@ -1565,6 +1565,9 @@ static void cik_pcie_gen3_enable(struct + int ret, i; + u16 tmp16; + ++ if (pci_is_root_bus(adev->pdev->bus)) ++ return; ++ + if (amdgpu_pcie_gen2 == 0) + return; + +--- a/drivers/gpu/drm/amd/amdgpu/vi.c ++++ b/drivers/gpu/drm/amd/amdgpu/vi.c +@@ -968,6 +968,9 @@ static void vi_pcie_gen3_enable(struct a + u32 mask; + int ret; + ++ if (pci_is_root_bus(adev->pdev->bus)) ++ return; ++ + if (amdgpu_pcie_gen2 == 0) + return; + diff --git a/queue-4.2/drm-amdgpu-fix-num_crtc-on-cz.patch b/queue-4.2/drm-amdgpu-fix-num_crtc-on-cz.patch new file mode 100644 index 00000000000..ccd60eb8bbe --- /dev/null +++ b/queue-4.2/drm-amdgpu-fix-num_crtc-on-cz.patch @@ -0,0 +1,29 @@ +From 26d0c21db1fd1679fcf07863741c13ba5ce37a65 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Mon, 5 Oct 2015 10:15:14 -0400 +Subject: drm/amdgpu: fix num_crtc on CZ + +From: Alex Deucher + +commit 26d0c21db1fd1679fcf07863741c13ba5ce37a65 upstream. + +Hw only has 3 crtcs. copy paste typo. + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c +@@ -2888,7 +2888,7 @@ static int dce_v11_0_early_init(void *ha + + switch (adev->asic_type) { + case CHIP_CARRIZO: +- adev->mode_info.num_crtc = 4; ++ adev->mode_info.num_crtc = 3; + adev->mode_info.num_hpd = 6; + adev->mode_info.num_dig = 9; + break; diff --git a/queue-4.2/drm-amdgpu-keep-the-pflip-interrupts-always-enabled-v7.patch b/queue-4.2/drm-amdgpu-keep-the-pflip-interrupts-always-enabled-v7.patch new file mode 100644 index 00000000000..45daa5a42b7 --- /dev/null +++ b/queue-4.2/drm-amdgpu-keep-the-pflip-interrupts-always-enabled-v7.patch @@ -0,0 +1,294 @@ +From f6c7aba47bcc0b1cc2085c8d8af80f8c02f28269 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Michel=20D=C3=A4nzer?= +Date: Thu, 8 Oct 2015 17:48:04 +0900 +Subject: drm/amdgpu: Keep the pflip interrupts always enabled v7 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: =?UTF-8?q?Michel=20D=C3=A4nzer?= + +commit f6c7aba47bcc0b1cc2085c8d8af80f8c02f28269 upstream. + +This fixes flickering issues caused by prematurely firing pflip +interrupts. + +v2 (chk): add commit message, fix DCE V10/V11 and DM as well +v3: Re-enable pflip interrupt wherever we re-enable a CRTC +v4: Enable pflip interrupt in DAL as well +v5: drop DAL changes for upstream +v6: (agd): only enable interrupts on crtcs that exist +v7: (agd): integrate suggestions from Michel + +Signed-off-by: Michel Dänzer +Signed-off-by: Christian König +Reviewed-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 2 - + drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 30 ++++++++++++++++++++++++++-- + drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 30 ++++++++++++++++++++++++++-- + drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 30 ++++++++++++++++++++++++++-- + 4 files changed, 84 insertions(+), 8 deletions(-) + +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c +@@ -76,8 +76,6 @@ static void amdgpu_flip_work_func(struct + /* We borrow the event spin lock for protecting flip_status */ + spin_lock_irqsave(&crtc->dev->event_lock, flags); + +- /* set the proper interrupt */ +- amdgpu_irq_get(adev, &adev->pageflip_irq, work->crtc_id); + /* do the flip (mmio) */ + adev->mode_info.funcs->page_flip(adev, work->crtc_id, work->base); + /* set the flip status */ +--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c +@@ -233,6 +233,24 @@ static u32 dce_v10_0_vblank_get_counter( + return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]); + } + ++static void dce_v10_0_pageflip_interrupt_init(struct amdgpu_device *adev) ++{ ++ unsigned i; ++ ++ /* Enable pflip interrupts */ ++ for (i = 0; i < adev->mode_info.num_crtc; i++) ++ amdgpu_irq_get(adev, &adev->pageflip_irq, i); ++} ++ ++static void dce_v10_0_pageflip_interrupt_fini(struct amdgpu_device *adev) ++{ ++ unsigned i; ++ ++ /* Disable pflip interrupts */ ++ for (i = 0; i < adev->mode_info.num_crtc; i++) ++ amdgpu_irq_put(adev, &adev->pageflip_irq, i); ++} ++ + /** + * dce_v10_0_page_flip - pageflip callback. + * +@@ -2641,9 +2659,10 @@ static void dce_v10_0_crtc_dpms(struct d + dce_v10_0_vga_enable(crtc, true); + amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE); + dce_v10_0_vga_enable(crtc, false); +- /* Make sure VBLANK interrupt is still enabled */ ++ /* Make sure VBLANK and PFLIP interrupts are still enabled */ + type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id); + amdgpu_irq_update(adev, &adev->crtc_irq, type); ++ amdgpu_irq_update(adev, &adev->pageflip_irq, type); + drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id); + dce_v10_0_crtc_load_lut(crtc); + break; +@@ -3002,6 +3021,8 @@ static int dce_v10_0_hw_init(void *handl + dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); + } + ++ dce_v10_0_pageflip_interrupt_init(adev); ++ + return 0; + } + +@@ -3016,6 +3037,8 @@ static int dce_v10_0_hw_fini(void *handl + dce_v10_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); + } + ++ dce_v10_0_pageflip_interrupt_fini(adev); ++ + return 0; + } + +@@ -3027,6 +3050,8 @@ static int dce_v10_0_suspend(void *handl + + dce_v10_0_hpd_fini(adev); + ++ dce_v10_0_pageflip_interrupt_fini(adev); ++ + return 0; + } + +@@ -3052,6 +3077,8 @@ static int dce_v10_0_resume(void *handle + /* initialize hpd */ + dce_v10_0_hpd_init(adev); + ++ dce_v10_0_pageflip_interrupt_init(adev); ++ + return 0; + } + +@@ -3346,7 +3373,6 @@ static int dce_v10_0_pageflip_irq(struct + spin_unlock_irqrestore(&adev->ddev->event_lock, flags); + + drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id); +- amdgpu_irq_put(adev, &adev->pageflip_irq, crtc_id); + queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work); + + return 0; +--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c +@@ -233,6 +233,24 @@ static u32 dce_v11_0_vblank_get_counter( + return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]); + } + ++static void dce_v11_0_pageflip_interrupt_init(struct amdgpu_device *adev) ++{ ++ unsigned i; ++ ++ /* Enable pflip interrupts */ ++ for (i = 0; i < adev->mode_info.num_crtc; i++) ++ amdgpu_irq_get(adev, &adev->pageflip_irq, i); ++} ++ ++static void dce_v11_0_pageflip_interrupt_fini(struct amdgpu_device *adev) ++{ ++ unsigned i; ++ ++ /* Disable pflip interrupts */ ++ for (i = 0; i < adev->mode_info.num_crtc; i++) ++ amdgpu_irq_put(adev, &adev->pageflip_irq, i); ++} ++ + /** + * dce_v11_0_page_flip - pageflip callback. + * +@@ -2640,9 +2658,10 @@ static void dce_v11_0_crtc_dpms(struct d + dce_v11_0_vga_enable(crtc, true); + amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE); + dce_v11_0_vga_enable(crtc, false); +- /* Make sure VBLANK interrupt is still enabled */ ++ /* Make sure VBLANK and PFLIP interrupts are still enabled */ + type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id); + amdgpu_irq_update(adev, &adev->crtc_irq, type); ++ amdgpu_irq_update(adev, &adev->pageflip_irq, type); + drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id); + dce_v11_0_crtc_load_lut(crtc); + break; +@@ -3000,6 +3019,8 @@ static int dce_v11_0_hw_init(void *handl + dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); + } + ++ dce_v11_0_pageflip_interrupt_init(adev); ++ + return 0; + } + +@@ -3014,6 +3035,8 @@ static int dce_v11_0_hw_fini(void *handl + dce_v11_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); + } + ++ dce_v11_0_pageflip_interrupt_fini(adev); ++ + return 0; + } + +@@ -3025,6 +3048,8 @@ static int dce_v11_0_suspend(void *handl + + dce_v11_0_hpd_fini(adev); + ++ dce_v11_0_pageflip_interrupt_fini(adev); ++ + return 0; + } + +@@ -3051,6 +3076,8 @@ static int dce_v11_0_resume(void *handle + /* initialize hpd */ + dce_v11_0_hpd_init(adev); + ++ dce_v11_0_pageflip_interrupt_init(adev); ++ + return 0; + } + +@@ -3345,7 +3372,6 @@ static int dce_v11_0_pageflip_irq(struct + spin_unlock_irqrestore(&adev->ddev->event_lock, flags); + + drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id); +- amdgpu_irq_put(adev, &adev->pageflip_irq, crtc_id); + queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work); + + return 0; +--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c +@@ -204,6 +204,24 @@ static u32 dce_v8_0_vblank_get_counter(s + return RREG32(mmCRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]); + } + ++static void dce_v8_0_pageflip_interrupt_init(struct amdgpu_device *adev) ++{ ++ unsigned i; ++ ++ /* Enable pflip interrupts */ ++ for (i = 0; i < adev->mode_info.num_crtc; i++) ++ amdgpu_irq_get(adev, &adev->pageflip_irq, i); ++} ++ ++static void dce_v8_0_pageflip_interrupt_fini(struct amdgpu_device *adev) ++{ ++ unsigned i; ++ ++ /* Disable pflip interrupts */ ++ for (i = 0; i < adev->mode_info.num_crtc; i++) ++ amdgpu_irq_put(adev, &adev->pageflip_irq, i); ++} ++ + /** + * dce_v8_0_page_flip - pageflip callback. + * +@@ -2575,9 +2593,10 @@ static void dce_v8_0_crtc_dpms(struct dr + dce_v8_0_vga_enable(crtc, true); + amdgpu_atombios_crtc_blank(crtc, ATOM_DISABLE); + dce_v8_0_vga_enable(crtc, false); +- /* Make sure VBLANK interrupt is still enabled */ ++ /* Make sure VBLANK and PFLIP interrupts are still enabled */ + type = amdgpu_crtc_idx_to_irq_type(adev, amdgpu_crtc->crtc_id); + amdgpu_irq_update(adev, &adev->crtc_irq, type); ++ amdgpu_irq_update(adev, &adev->pageflip_irq, type); + drm_vblank_post_modeset(dev, amdgpu_crtc->crtc_id); + dce_v8_0_crtc_load_lut(crtc); + break; +@@ -2933,6 +2952,8 @@ static int dce_v8_0_hw_init(void *handle + dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); + } + ++ dce_v8_0_pageflip_interrupt_init(adev); ++ + return 0; + } + +@@ -2947,6 +2968,8 @@ static int dce_v8_0_hw_fini(void *handle + dce_v8_0_audio_enable(adev, &adev->mode_info.audio.pin[i], false); + } + ++ dce_v8_0_pageflip_interrupt_fini(adev); ++ + return 0; + } + +@@ -2958,6 +2981,8 @@ static int dce_v8_0_suspend(void *handle + + dce_v8_0_hpd_fini(adev); + ++ dce_v8_0_pageflip_interrupt_fini(adev); ++ + return 0; + } + +@@ -2981,6 +3006,8 @@ static int dce_v8_0_resume(void *handle) + /* initialize hpd */ + dce_v8_0_hpd_init(adev); + ++ dce_v8_0_pageflip_interrupt_init(adev); ++ + return 0; + } + +@@ -3376,7 +3403,6 @@ static int dce_v8_0_pageflip_irq(struct + spin_unlock_irqrestore(&adev->ddev->event_lock, flags); + + drm_vblank_put(adev->ddev, amdgpu_crtc->crtc_id); +- amdgpu_irq_put(adev, &adev->pageflip_irq, crtc_id); + queue_work(amdgpu_crtc->pflip_queue, &works->unpin_work); + + return 0; diff --git a/queue-4.2/drm-dp-mst-make-mst-i2c-transfer-code-more-robust.patch b/queue-4.2/drm-dp-mst-make-mst-i2c-transfer-code-more-robust.patch new file mode 100644 index 00000000000..519cc166ae5 --- /dev/null +++ b/queue-4.2/drm-dp-mst-make-mst-i2c-transfer-code-more-robust.patch @@ -0,0 +1,58 @@ +From ae491542cbbbcca0ec8938c37d4079a985e58440 Mon Sep 17 00:00:00 2001 +From: Dave Airlie +Date: Wed, 14 Oct 2015 18:51:17 +1000 +Subject: drm/dp/mst: make mst i2c transfer code more robust. + +From: Dave Airlie + +commit ae491542cbbbcca0ec8938c37d4079a985e58440 upstream. + +This zeroes the msg so no random stack data ends up getting +sent, it also limits the function to not accepting > 4 +i2c msgs. + +Reviewed-by: Daniel Vetter +Signed-off-by: Dave Airlie +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/drm_dp_mst_topology.c | 3 ++- + include/drm/drm_dp_mst_helper.h | 3 ++- + 2 files changed, 4 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/drm_dp_mst_topology.c ++++ b/drivers/gpu/drm/drm_dp_mst_topology.c +@@ -2789,12 +2789,13 @@ static int drm_dp_mst_i2c_xfer(struct i2 + if (msgs[num - 1].flags & I2C_M_RD) + reading = true; + +- if (!reading) { ++ if (!reading || (num - 1 > DP_REMOTE_I2C_READ_MAX_TRANSACTIONS)) { + DRM_DEBUG_KMS("Unsupported I2C transaction for MST device\n"); + ret = -EIO; + goto out; + } + ++ memset(&msg, 0, sizeof(msg)); + msg.req_type = DP_REMOTE_I2C_READ; + msg.u.i2c_read.num_transactions = num - 1; + msg.u.i2c_read.port_number = port->port_num; +--- a/include/drm/drm_dp_mst_helper.h ++++ b/include/drm/drm_dp_mst_helper.h +@@ -253,6 +253,7 @@ struct drm_dp_remote_dpcd_write { + u8 *bytes; + }; + ++#define DP_REMOTE_I2C_READ_MAX_TRANSACTIONS 4 + struct drm_dp_remote_i2c_read { + u8 num_transactions; + u8 port_number; +@@ -262,7 +263,7 @@ struct drm_dp_remote_i2c_read { + u8 *bytes; + u8 no_stop_bit; + u8 i2c_transaction_delay; +- } transactions[4]; ++ } transactions[DP_REMOTE_I2C_READ_MAX_TRANSACTIONS]; + u8 read_i2c_device_id; + u8 num_bytes_read; + }; diff --git a/queue-4.2/drm-radeon-add-pm-sysfs-files-late.patch b/queue-4.2/drm-radeon-add-pm-sysfs-files-late.patch new file mode 100644 index 00000000000..7898e54dd7f --- /dev/null +++ b/queue-4.2/drm-radeon-add-pm-sysfs-files-late.patch @@ -0,0 +1,131 @@ +From 51a4726b04e880fdd9b4e0e58b13f70b0a68a7f5 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Wed, 30 Sep 2015 16:45:52 -0400 +Subject: drm/radeon: add pm sysfs files late + +From: Alex Deucher + +commit 51a4726b04e880fdd9b4e0e58b13f70b0a68a7f5 upstream. + +They were added relatively early in the driver init process +which meant that in some cases the driver was not finished +initializing before external tools tried to use them which +could result in a crash depending on the timing. + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/radeon_display.c | 14 +------ + drivers/gpu/drm/radeon/radeon_pm.c | 63 +++++++++++++++++++------------- + 2 files changed, 40 insertions(+), 37 deletions(-) + +--- a/drivers/gpu/drm/radeon/radeon_display.c ++++ b/drivers/gpu/drm/radeon/radeon_display.c +@@ -1633,18 +1633,8 @@ int radeon_modeset_init(struct radeon_de + radeon_fbdev_init(rdev); + drm_kms_helper_poll_init(rdev->ddev); + +- if (rdev->pm.dpm_enabled) { +- /* do dpm late init */ +- ret = radeon_pm_late_init(rdev); +- if (ret) { +- rdev->pm.dpm_enabled = false; +- DRM_ERROR("radeon_pm_late_init failed, disabling dpm\n"); +- } +- /* set the dpm state for PX since there won't be +- * a modeset to call this. +- */ +- radeon_pm_compute_clocks(rdev); +- } ++ /* do pm late init */ ++ ret = radeon_pm_late_init(rdev); + + return 0; + } +--- a/drivers/gpu/drm/radeon/radeon_pm.c ++++ b/drivers/gpu/drm/radeon/radeon_pm.c +@@ -1331,14 +1331,6 @@ static int radeon_pm_init_old(struct rad + INIT_DELAYED_WORK(&rdev->pm.dynpm_idle_work, radeon_dynpm_idle_work_handler); + + if (rdev->pm.num_power_states > 1) { +- /* where's the best place to put these? */ +- ret = device_create_file(rdev->dev, &dev_attr_power_profile); +- if (ret) +- DRM_ERROR("failed to create device file for power profile\n"); +- ret = device_create_file(rdev->dev, &dev_attr_power_method); +- if (ret) +- DRM_ERROR("failed to create device file for power method\n"); +- + if (radeon_debugfs_pm_init(rdev)) { + DRM_ERROR("Failed to register debugfs file for PM!\n"); + } +@@ -1396,20 +1388,6 @@ static int radeon_pm_init_dpm(struct rad + goto dpm_failed; + rdev->pm.dpm_enabled = true; + +- ret = device_create_file(rdev->dev, &dev_attr_power_dpm_state); +- if (ret) +- DRM_ERROR("failed to create device file for dpm state\n"); +- ret = device_create_file(rdev->dev, &dev_attr_power_dpm_force_performance_level); +- if (ret) +- DRM_ERROR("failed to create device file for dpm state\n"); +- /* XXX: these are noops for dpm but are here for backwards compat */ +- ret = device_create_file(rdev->dev, &dev_attr_power_profile); +- if (ret) +- DRM_ERROR("failed to create device file for power profile\n"); +- ret = device_create_file(rdev->dev, &dev_attr_power_method); +- if (ret) +- DRM_ERROR("failed to create device file for power method\n"); +- + if (radeon_debugfs_pm_init(rdev)) { + DRM_ERROR("Failed to register debugfs file for dpm!\n"); + } +@@ -1550,9 +1528,44 @@ int radeon_pm_late_init(struct radeon_de + int ret = 0; + + if (rdev->pm.pm_method == PM_METHOD_DPM) { +- mutex_lock(&rdev->pm.mutex); +- ret = radeon_dpm_late_enable(rdev); +- mutex_unlock(&rdev->pm.mutex); ++ if (rdev->pm.dpm_enabled) { ++ ret = device_create_file(rdev->dev, &dev_attr_power_dpm_state); ++ if (ret) ++ DRM_ERROR("failed to create device file for dpm state\n"); ++ ret = device_create_file(rdev->dev, &dev_attr_power_dpm_force_performance_level); ++ if (ret) ++ DRM_ERROR("failed to create device file for dpm state\n"); ++ /* XXX: these are noops for dpm but are here for backwards compat */ ++ ret = device_create_file(rdev->dev, &dev_attr_power_profile); ++ if (ret) ++ DRM_ERROR("failed to create device file for power profile\n"); ++ ret = device_create_file(rdev->dev, &dev_attr_power_method); ++ if (ret) ++ DRM_ERROR("failed to create device file for power method\n"); ++ ++ mutex_lock(&rdev->pm.mutex); ++ ret = radeon_dpm_late_enable(rdev); ++ mutex_unlock(&rdev->pm.mutex); ++ if (ret) { ++ rdev->pm.dpm_enabled = false; ++ DRM_ERROR("radeon_pm_late_init failed, disabling dpm\n"); ++ } else { ++ /* set the dpm state for PX since there won't be ++ * a modeset to call this. ++ */ ++ radeon_pm_compute_clocks(rdev); ++ } ++ } ++ } else { ++ if (rdev->pm.num_power_states > 1) { ++ /* where's the best place to put these? */ ++ ret = device_create_file(rdev->dev, &dev_attr_power_profile); ++ if (ret) ++ DRM_ERROR("failed to create device file for power profile\n"); ++ ret = device_create_file(rdev->dev, &dev_attr_power_method); ++ if (ret) ++ DRM_ERROR("failed to create device file for power method\n"); ++ } + } + return ret; + } diff --git a/queue-4.2/drm-radeon-attach-tile-property-to-mst-connector.patch b/queue-4.2/drm-radeon-attach-tile-property-to-mst-connector.patch new file mode 100644 index 00000000000..dfe6d714f6e --- /dev/null +++ b/queue-4.2/drm-radeon-attach-tile-property-to-mst-connector.patch @@ -0,0 +1,28 @@ +From bc8c131ccdd62d4ed4f33c6b50f92907e7c32dee Mon Sep 17 00:00:00 2001 +From: Dave Airlie +Date: Thu, 15 Oct 2015 09:04:21 +1000 +Subject: drm/radeon: attach tile property to mst connector + +From: Dave Airlie + +commit bc8c131ccdd62d4ed4f33c6b50f92907e7c32dee upstream. + +This allows tiled monitors to work with radeon once mst is enabled. + +Signed-off-by: Dave Airlie +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/radeon_dp_mst.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/gpu/drm/radeon/radeon_dp_mst.c ++++ b/drivers/gpu/drm/radeon/radeon_dp_mst.c +@@ -283,6 +283,7 @@ static struct drm_connector *radeon_dp_a + radeon_connector->mst_encoder = radeon_dp_create_fake_mst_encoder(master); + + drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); ++ drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); + drm_mode_connector_set_path_property(connector, pathprop); + drm_reinit_primary_mode_group(dev); + diff --git a/queue-4.2/series b/queue-4.2/series index e22655db344..b411c17df52 100644 --- a/queue-4.2/series +++ b/queue-4.2/series @@ -39,3 +39,11 @@ kvm-x86-fix-smi-to-halted-vcpu.patch kvm-x86-fix-rsm-into-64-bit-protected-mode.patch drm-qxl-fix-framebuffer-dirty-rectangle-tracking.patch drm-nouveau-fbcon-take-runpm-reference-when-userspace-has-an-open-fd.patch +drm-dp-mst-make-mst-i2c-transfer-code-more-robust.patch +drm-radeon-attach-tile-property-to-mst-connector.patch +drm-radeon-add-pm-sysfs-files-late.patch +drm-amdgpu-add-pm-sysfs-files-late.patch +drm-amdgpu-fix-num_crtc-on-cz.patch +drm-amdgpu-check-before-checking-pci-bridge-registers.patch +drm-amdgpu-keep-the-pflip-interrupts-always-enabled-v7.patch +dm-thin-fix-missing-pool-reference-count-decrement-in-pool_ctr-error-path.patch