From: Yanteng Si Date: Wed, 7 Aug 2024 13:48:02 +0000 (+0800) Subject: net: stmmac: dwmac-loongson: Init ref and PTP clocks rate X-Git-Tag: v6.12-rc1~232^2~270^2~6 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=c70f3163681381c15686bdd2fe56bf4af9b8aaaa;p=thirdparty%2Fkernel%2Flinux.git net: stmmac: dwmac-loongson: Init ref and PTP clocks rate Reference and PTP clocks rate of the Loongson GMAC devices is 125MHz. (So is in the GNET devices which support is about to be added.) Set the respective plat_stmmacenet_data field up in accordance with that so to have the coalesce command and timestamping work correctly. Fixes: 30bba69d7db4 ("stmmac: pci: Add dwmac support for Loongson") Signed-off-by: Feiyang Chen Signed-off-by: Yinggang Gu Reviewed-by: Serge Semin Acked-by: Huacai Chen Signed-off-by: Yanteng Si Tested-by: Serge Semin Signed-off-by: Paolo Abeni --- diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c index 9b2e4bdf7cc76..327275b28dc2c 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-loongson.c @@ -35,6 +35,9 @@ static void loongson_default_data(struct plat_stmmacenet_data *plat) /* Disable RX queues routing by default */ plat->rx_queues_cfg[0].pkt_route = 0x0; + plat->clk_ref_rate = 125000000; + plat->clk_ptp_rate = 125000000; + /* Default to phy auto-detection */ plat->phy_addr = -1;