From: Sasha Levin Date: Tue, 6 Sep 2022 03:26:12 +0000 (-0400) Subject: Fixes for 4.19 X-Git-Tag: v5.10.142~41 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=c7e89ea26f99fe9c9f8da734bfcf5c7766169527;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 4.19 Signed-off-by: Sasha Levin --- diff --git a/queue-4.19/clk-core-fix-runtime-pm-sequence-in-clk_core_unprepa.patch b/queue-4.19/clk-core-fix-runtime-pm-sequence-in-clk_core_unprepa.patch new file mode 100644 index 00000000000..d0809b70098 --- /dev/null +++ b/queue-4.19/clk-core-fix-runtime-pm-sequence-in-clk_core_unprepa.patch @@ -0,0 +1,50 @@ +From 78dee23eecbe6f385e509195960205a3efdfec0f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 22 Aug 2022 16:14:24 +0800 +Subject: clk: core: Fix runtime PM sequence in clk_core_unprepare() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Chen-Yu Tsai + +[ Upstream commit 4b592061f7b3971c70e8b72fc42aaead47c24701 ] + +In the original commit 9a34b45397e5 ("clk: Add support for runtime PM"), +the commit message mentioned that pm_runtime_put_sync() would be done +at the end of clk_core_unprepare(). This mirrors the operations in +clk_core_prepare() in the opposite order. + +However, the actual code that was added wasn't in the order the commit +message described. Move clk_pm_runtime_put() to the end of +clk_core_unprepare() so that it is in the correct order. + +Fixes: 9a34b45397e5 ("clk: Add support for runtime PM") +Signed-off-by: Chen-Yu Tsai +Reviewed-by: Nícolas F. R. A. Prado +Link: https://lore.kernel.org/r/20220822081424.1310926-3-wenst@chromium.org +Signed-off-by: Stephen Boyd +Signed-off-by: Sasha Levin +--- + drivers/clk/clk.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c +index 32606d1094fe4..53ac3a0e741d7 100644 +--- a/drivers/clk/clk.c ++++ b/drivers/clk/clk.c +@@ -732,10 +732,9 @@ static void clk_core_unprepare(struct clk_core *core) + if (core->ops->unprepare) + core->ops->unprepare(core->hw); + +- clk_pm_runtime_put(core); +- + trace_clk_unprepare_complete(core); + clk_core_unprepare(core->parent); ++ clk_pm_runtime_put(core); + } + + static void clk_core_unprepare_lock(struct clk_core *core) +-- +2.35.1 + diff --git a/queue-4.19/clk-core-honor-clk_ops_parent_enable-for-clk-gate-op.patch b/queue-4.19/clk-core-honor-clk_ops_parent_enable-for-clk-gate-op.patch new file mode 100644 index 00000000000..e38b808e52f --- /dev/null +++ b/queue-4.19/clk-core-honor-clk_ops_parent_enable-for-clk-gate-op.patch @@ -0,0 +1,127 @@ +From 1a7720a72da9c30e62655eeb0e108737c8fe35c0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 22 Aug 2022 16:14:23 +0800 +Subject: clk: core: Honor CLK_OPS_PARENT_ENABLE for clk gate ops +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Chen-Yu Tsai + +[ Upstream commit 35b0fac808b95eea1212f8860baf6ad25b88b087 ] + +In the previous commits that added CLK_OPS_PARENT_ENABLE, support for +this flag was only added to rate change operations (rate setting and +reparent) and disabling unused subtree. It was not added to the +clock gate related operations. Any hardware driver that needs it for +these operations will either see bogus results, or worse, hang. + +This has been seen on MT8192 and MT8195, where the imp_ii2_* clk +drivers set this, but dumping debugfs clk_summary would cause it +to hang. + +Fixes: fc8726a2c021 ("clk: core: support clocks which requires parents enable (part 2)") +Fixes: a4b3518d146f ("clk: core: support clocks which requires parents enable (part 1)") +Signed-off-by: Chen-Yu Tsai +Reviewed-by: Nícolas F. R. A. Prado +Tested-by: Nícolas F. R. A. Prado +Link: https://lore.kernel.org/r/20220822081424.1310926-2-wenst@chromium.org +Signed-off-by: Stephen Boyd +Signed-off-by: Sasha Levin +--- + drivers/clk/clk.c | 28 ++++++++++++++++++++++++++++ + 1 file changed, 28 insertions(+) + +diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c +index 32606d1094fe4..4021c7c10c8d9 100644 +--- a/drivers/clk/clk.c ++++ b/drivers/clk/clk.c +@@ -196,6 +196,9 @@ static bool clk_core_rate_is_protected(struct clk_core *core) + return core->protect_count; + } + ++static int clk_core_prepare_enable(struct clk_core *core); ++static void clk_core_disable_unprepare(struct clk_core *core); ++ + static bool clk_core_is_prepared(struct clk_core *core) + { + bool ret = false; +@@ -208,7 +211,11 @@ static bool clk_core_is_prepared(struct clk_core *core) + return core->prepare_count; + + if (!clk_pm_runtime_get(core)) { ++ if (core->flags & CLK_OPS_PARENT_ENABLE) ++ clk_core_prepare_enable(core->parent); + ret = core->ops->is_prepared(core->hw); ++ if (core->flags & CLK_OPS_PARENT_ENABLE) ++ clk_core_disable_unprepare(core->parent); + clk_pm_runtime_put(core); + } + +@@ -244,7 +251,13 @@ static bool clk_core_is_enabled(struct clk_core *core) + } + } + ++ if (core->flags & CLK_OPS_PARENT_ENABLE) ++ clk_core_prepare_enable(core->parent); ++ + ret = core->ops->is_enabled(core->hw); ++ ++ if (core->flags & CLK_OPS_PARENT_ENABLE) ++ clk_core_disable_unprepare(core->parent); + done: + if (core->dev) + pm_runtime_put(core->dev); +@@ -704,6 +717,9 @@ int clk_rate_exclusive_get(struct clk *clk) + } + EXPORT_SYMBOL_GPL(clk_rate_exclusive_get); + ++static int clk_core_enable_lock(struct clk_core *core); ++static void clk_core_disable_lock(struct clk_core *core); ++ + static void clk_core_unprepare(struct clk_core *core) + { + lockdep_assert_held(&prepare_lock); +@@ -727,6 +743,9 @@ static void clk_core_unprepare(struct clk_core *core) + + WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name); + ++ if (core->flags & CLK_OPS_PARENT_ENABLE) ++ clk_core_enable_lock(core->parent); ++ + trace_clk_unprepare(core); + + if (core->ops->unprepare) +@@ -735,6 +754,9 @@ static void clk_core_unprepare(struct clk_core *core) + clk_pm_runtime_put(core); + + trace_clk_unprepare_complete(core); ++ ++ if (core->flags & CLK_OPS_PARENT_ENABLE) ++ clk_core_disable_lock(core->parent); + clk_core_unprepare(core->parent); + } + +@@ -783,6 +805,9 @@ static int clk_core_prepare(struct clk_core *core) + if (ret) + goto runtime_put; + ++ if (core->flags & CLK_OPS_PARENT_ENABLE) ++ clk_core_enable_lock(core->parent); ++ + trace_clk_prepare(core); + + if (core->ops->prepare) +@@ -790,6 +815,9 @@ static int clk_core_prepare(struct clk_core *core) + + trace_clk_prepare_complete(core); + ++ if (core->flags & CLK_OPS_PARENT_ENABLE) ++ clk_core_disable_lock(core->parent); ++ + if (ret) + goto unprepare; + } +-- +2.35.1 + diff --git a/queue-4.19/drm-i915-reg-fix-spelling-mistake-unsupport-unsuppor.patch b/queue-4.19/drm-i915-reg-fix-spelling-mistake-unsupport-unsuppor.patch new file mode 100644 index 00000000000..313e2dc3a6f --- /dev/null +++ b/queue-4.19/drm-i915-reg-fix-spelling-mistake-unsupport-unsuppor.patch @@ -0,0 +1,38 @@ +From 2b3f5681ec285c92f8e62b9083452216a8753897 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 16 Aug 2022 13:02:47 +0800 +Subject: drm/i915/reg: Fix spelling mistake "Unsupport" -> "Unsupported" + +From: Colin Ian King + +[ Upstream commit 233f56745be446b289edac2ba8184c09365c005e ] + +There is a spelling mistake in a gvt_vgpu_err error message. Fix it. + +Fixes: 695fbc08d80f ("drm/i915/gvt: replace the gvt_err with gvt_vgpu_err") +Signed-off-by: Colin Ian King +Signed-off-by: Zhi Wang +Link: http://patchwork.freedesktop.org/patch/msgid/20220315202449.2952845-1-colin.i.king@gmail.com +Reviewed-by: Zhi Wang +Signed-off-by: Zhenyu Wang +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/i915/gvt/handlers.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c +index 94c1089ecf59e..1bde4b618d151 100644 +--- a/drivers/gpu/drm/i915/gvt/handlers.c ++++ b/drivers/gpu/drm/i915/gvt/handlers.c +@@ -651,7 +651,7 @@ static int update_fdi_rx_iir_status(struct intel_vgpu *vgpu, + else if (FDI_RX_IMR_TO_PIPE(offset) != INVALID_INDEX) + index = FDI_RX_IMR_TO_PIPE(offset); + else { +- gvt_vgpu_err("Unsupport registers %x\n", offset); ++ gvt_vgpu_err("Unsupported registers %x\n", offset); + return -EINVAL; + } + +-- +2.35.1 + diff --git a/queue-4.19/hwmon-gpio-fan-fix-array-out-of-bounds-access.patch b/queue-4.19/hwmon-gpio-fan-fix-array-out-of-bounds-access.patch new file mode 100644 index 00000000000..94f2769261b --- /dev/null +++ b/queue-4.19/hwmon-gpio-fan-fix-array-out-of-bounds-access.patch @@ -0,0 +1,100 @@ +From 2deebf229393fe6b23e0630104cf10c0050a4b53 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 30 Aug 2022 03:11:01 +0200 +Subject: hwmon: (gpio-fan) Fix array out of bounds access + +From: Armin Wolf + +[ Upstream commit f233d2be38dbbb22299192292983037f01ab363c ] + +The driver does not check if the cooling state passed to +gpio_fan_set_cur_state() exceeds the maximum cooling state as +stored in fan_data->num_speeds. Since the cooling state is later +used as an array index in set_fan_speed(), an array out of bounds +access can occur. +This can be exploited by setting the state of the thermal cooling device +to arbitrary values, causing for example a kernel oops when unavailable +memory is accessed this way. + +Example kernel oops: +[ 807.987276] Unable to handle kernel paging request at virtual address ffffff80d0588064 +[ 807.987369] Mem abort info: +[ 807.987398] ESR = 0x96000005 +[ 807.987428] EC = 0x25: DABT (current EL), IL = 32 bits +[ 807.987477] SET = 0, FnV = 0 +[ 807.987507] EA = 0, S1PTW = 0 +[ 807.987536] FSC = 0x05: level 1 translation fault +[ 807.987570] Data abort info: +[ 807.987763] ISV = 0, ISS = 0x00000005 +[ 807.987801] CM = 0, WnR = 0 +[ 807.987832] swapper pgtable: 4k pages, 39-bit VAs, pgdp=0000000001165000 +[ 807.987872] [ffffff80d0588064] pgd=0000000000000000, p4d=0000000000000000, pud=0000000000000000 +[ 807.987961] Internal error: Oops: 96000005 [#1] PREEMPT SMP +[ 807.987992] Modules linked in: cmac algif_hash aes_arm64 algif_skcipher af_alg bnep hci_uart btbcm bluetooth ecdh_generic ecc 8021q garp stp llc snd_soc_hdmi_codec brcmfmac vc4 brcmutil cec drm_kms_helper snd_soc_core cfg80211 snd_compress bcm2835_codec(C) snd_pcm_dmaengine syscopyarea bcm2835_isp(C) bcm2835_v4l2(C) sysfillrect v4l2_mem2mem bcm2835_mmal_vchiq(C) raspberrypi_hwmon sysimgblt videobuf2_dma_contig videobuf2_vmalloc fb_sys_fops videobuf2_memops rfkill videobuf2_v4l2 videobuf2_common i2c_bcm2835 snd_bcm2835(C) videodev snd_pcm snd_timer snd mc vc_sm_cma(C) gpio_fan uio_pdrv_genirq uio drm fuse drm_panel_orientation_quirks backlight ip_tables x_tables ipv6 +[ 807.988508] CPU: 0 PID: 1321 Comm: bash Tainted: G C 5.15.56-v8+ #1575 +[ 807.988548] Hardware name: Raspberry Pi 3 Model B Rev 1.2 (DT) +[ 807.988574] pstate: 20000005 (nzCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--) +[ 807.988608] pc : set_fan_speed.part.5+0x34/0x80 [gpio_fan] +[ 807.988654] lr : gpio_fan_set_cur_state+0x34/0x50 [gpio_fan] +[ 807.988691] sp : ffffffc008cf3bd0 +[ 807.988710] x29: ffffffc008cf3bd0 x28: ffffff80019edac0 x27: 0000000000000000 +[ 807.988762] x26: 0000000000000000 x25: 0000000000000000 x24: ffffff800747c920 +[ 807.988787] x23: 000000000000000a x22: ffffff800369f000 x21: 000000001999997c +[ 807.988854] x20: ffffff800369f2e8 x19: ffffff8002ae8080 x18: 0000000000000000 +[ 807.988877] x17: 0000000000000000 x16: 0000000000000000 x15: 000000559e271b70 +[ 807.988938] x14: 0000000000000000 x13: 0000000000000000 x12: 0000000000000000 +[ 807.988960] x11: 0000000000000000 x10: ffffffc008cf3c20 x9 : ffffffcfb60c741c +[ 807.989018] x8 : 000000000000000a x7 : 00000000ffffffc9 x6 : 0000000000000009 +[ 807.989040] x5 : 000000000000002a x4 : 0000000000000000 x3 : ffffff800369f2e8 +[ 807.989062] x2 : 000000000000e780 x1 : 0000000000000001 x0 : ffffff80d0588060 +[ 807.989084] Call trace: +[ 807.989091] set_fan_speed.part.5+0x34/0x80 [gpio_fan] +[ 807.989113] gpio_fan_set_cur_state+0x34/0x50 [gpio_fan] +[ 807.989199] cur_state_store+0x84/0xd0 +[ 807.989221] dev_attr_store+0x20/0x38 +[ 807.989262] sysfs_kf_write+0x4c/0x60 +[ 807.989282] kernfs_fop_write_iter+0x130/0x1c0 +[ 807.989298] new_sync_write+0x10c/0x190 +[ 807.989315] vfs_write+0x254/0x378 +[ 807.989362] ksys_write+0x70/0xf8 +[ 807.989379] __arm64_sys_write+0x24/0x30 +[ 807.989424] invoke_syscall+0x4c/0x110 +[ 807.989442] el0_svc_common.constprop.3+0xfc/0x120 +[ 807.989458] do_el0_svc+0x2c/0x90 +[ 807.989473] el0_svc+0x24/0x60 +[ 807.989544] el0t_64_sync_handler+0x90/0xb8 +[ 807.989558] el0t_64_sync+0x1a0/0x1a4 +[ 807.989579] Code: b9403801 f9402800 7100003f 8b35cc00 (b9400416) +[ 807.989627] ---[ end trace 8ded4c918658445b ]--- + +Fix this by checking the cooling state and return an error if it +exceeds the maximum cooling state. + +Tested on a Raspberry Pi 3. + +Fixes: b5cf88e46bad ("(gpio-fan): Add thermal control hooks") +Signed-off-by: Armin Wolf +Link: https://lore.kernel.org/r/20220830011101.178843-1-W_Armin@gmx.de +Signed-off-by: Guenter Roeck +Signed-off-by: Sasha Levin +--- + drivers/hwmon/gpio-fan.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/hwmon/gpio-fan.c b/drivers/hwmon/gpio-fan.c +index a3974cddef079..534a175a6e4cf 100644 +--- a/drivers/hwmon/gpio-fan.c ++++ b/drivers/hwmon/gpio-fan.c +@@ -404,6 +404,9 @@ static int gpio_fan_set_cur_state(struct thermal_cooling_device *cdev, + if (!fan_data) + return -EINVAL; + ++ if (state >= fan_data->num_speed) ++ return -EINVAL; ++ + set_fan_speed(fan_data, state); + return 0; + } +-- +2.35.1 + diff --git a/queue-4.19/input-rk805-pwrkey-fix-module-autoloading.patch b/queue-4.19/input-rk805-pwrkey-fix-module-autoloading.patch new file mode 100644 index 00000000000..d3ed64c103e --- /dev/null +++ b/queue-4.19/input-rk805-pwrkey-fix-module-autoloading.patch @@ -0,0 +1,37 @@ +From 4cb17900942f75662d4b68c5c42e1d8db0b8b747 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 22 Aug 2022 16:33:18 -0700 +Subject: Input: rk805-pwrkey - fix module autoloading + +From: Peter Robinson + +[ Upstream commit 99077ad668ddd9b4823cc8ce3f3c7a3fc56f6fd9 ] + +Add the module alias so the rk805-pwrkey driver will +autoload when built as a module. + +Fixes: 5a35b85c2d92 ("Input: add power key driver for Rockchip RK805 PMIC") +Signed-off-by: Peter Robinson +Reviewed-by: Javier Martinez Canillas +Link: https://lore.kernel.org/r/20220612225437.3628788-1-pbrobinson@gmail.com +Signed-off-by: Dmitry Torokhov +Signed-off-by: Sasha Levin +--- + drivers/input/misc/rk805-pwrkey.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/input/misc/rk805-pwrkey.c b/drivers/input/misc/rk805-pwrkey.c +index 921003963a53c..cdcad5c01e3c0 100644 +--- a/drivers/input/misc/rk805-pwrkey.c ++++ b/drivers/input/misc/rk805-pwrkey.c +@@ -106,6 +106,7 @@ static struct platform_driver rk805_pwrkey_driver = { + }; + module_platform_driver(rk805_pwrkey_driver); + ++MODULE_ALIAS("platform:rk805-pwrkey"); + MODULE_AUTHOR("Joseph Chen "); + MODULE_DESCRIPTION("RK805 PMIC Power Key driver"); + MODULE_LICENSE("GPL"); +-- +2.35.1 + diff --git a/queue-4.19/revert-clk-core-honor-clk_ops_parent_enable-for-clk-.patch b/queue-4.19/revert-clk-core-honor-clk_ops_parent_enable-for-clk-.patch new file mode 100644 index 00000000000..a4da8e5c7d3 --- /dev/null +++ b/queue-4.19/revert-clk-core-honor-clk_ops_parent_enable-for-clk-.patch @@ -0,0 +1,117 @@ +From d39ee4dfc2b465cd128a78d1581c403ac7a646e8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 31 Aug 2022 10:53:25 -0700 +Subject: Revert "clk: core: Honor CLK_OPS_PARENT_ENABLE for clk gate ops" + +From: Stephen Boyd + +[ Upstream commit abb5f3f4b1f5f0ad50eb067a00051d3587dec9fb ] + +This reverts commit 35b0fac808b95eea1212f8860baf6ad25b88b087. Alexander +reports that it causes boot failures on i.MX8M Plus based boards +(specifically imx8mp-tqma8mpql-mba8mpxl.dts). + +Reported-by: Alexander Stein +Cc: Chen-Yu Tsai +Fixes: 35b0fac808b9 ("clk: core: Honor CLK_OPS_PARENT_ENABLE for clk gate ops") +Link: https://lore.kernel.org/r/12115951.O9o76ZdvQC@steina-w +Signed-off-by: Stephen Boyd +Link: https://lore.kernel.org/r/20220831175326.2523912-1-sboyd@kernel.org +Signed-off-by: Sasha Levin +--- + drivers/clk/clk.c | 28 ---------------------------- + 1 file changed, 28 deletions(-) + +diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c +index 4021c7c10c8d9..32606d1094fe4 100644 +--- a/drivers/clk/clk.c ++++ b/drivers/clk/clk.c +@@ -196,9 +196,6 @@ static bool clk_core_rate_is_protected(struct clk_core *core) + return core->protect_count; + } + +-static int clk_core_prepare_enable(struct clk_core *core); +-static void clk_core_disable_unprepare(struct clk_core *core); +- + static bool clk_core_is_prepared(struct clk_core *core) + { + bool ret = false; +@@ -211,11 +208,7 @@ static bool clk_core_is_prepared(struct clk_core *core) + return core->prepare_count; + + if (!clk_pm_runtime_get(core)) { +- if (core->flags & CLK_OPS_PARENT_ENABLE) +- clk_core_prepare_enable(core->parent); + ret = core->ops->is_prepared(core->hw); +- if (core->flags & CLK_OPS_PARENT_ENABLE) +- clk_core_disable_unprepare(core->parent); + clk_pm_runtime_put(core); + } + +@@ -251,13 +244,7 @@ static bool clk_core_is_enabled(struct clk_core *core) + } + } + +- if (core->flags & CLK_OPS_PARENT_ENABLE) +- clk_core_prepare_enable(core->parent); +- + ret = core->ops->is_enabled(core->hw); +- +- if (core->flags & CLK_OPS_PARENT_ENABLE) +- clk_core_disable_unprepare(core->parent); + done: + if (core->dev) + pm_runtime_put(core->dev); +@@ -717,9 +704,6 @@ int clk_rate_exclusive_get(struct clk *clk) + } + EXPORT_SYMBOL_GPL(clk_rate_exclusive_get); + +-static int clk_core_enable_lock(struct clk_core *core); +-static void clk_core_disable_lock(struct clk_core *core); +- + static void clk_core_unprepare(struct clk_core *core) + { + lockdep_assert_held(&prepare_lock); +@@ -743,9 +727,6 @@ static void clk_core_unprepare(struct clk_core *core) + + WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name); + +- if (core->flags & CLK_OPS_PARENT_ENABLE) +- clk_core_enable_lock(core->parent); +- + trace_clk_unprepare(core); + + if (core->ops->unprepare) +@@ -754,9 +735,6 @@ static void clk_core_unprepare(struct clk_core *core) + clk_pm_runtime_put(core); + + trace_clk_unprepare_complete(core); +- +- if (core->flags & CLK_OPS_PARENT_ENABLE) +- clk_core_disable_lock(core->parent); + clk_core_unprepare(core->parent); + } + +@@ -805,9 +783,6 @@ static int clk_core_prepare(struct clk_core *core) + if (ret) + goto runtime_put; + +- if (core->flags & CLK_OPS_PARENT_ENABLE) +- clk_core_enable_lock(core->parent); +- + trace_clk_prepare(core); + + if (core->ops->prepare) +@@ -815,9 +790,6 @@ static int clk_core_prepare(struct clk_core *core) + + trace_clk_prepare_complete(core); + +- if (core->flags & CLK_OPS_PARENT_ENABLE) +- clk_core_disable_lock(core->parent); +- + if (ret) + goto unprepare; + } +-- +2.35.1 + diff --git a/queue-4.19/series b/queue-4.19/series index c59499222bc..177322583c5 100644 --- a/queue-4.19/series +++ b/queue-4.19/series @@ -16,3 +16,9 @@ vt-clear-selection-before-changing-the-font.patch usb-serial-ftdi_sio-add-omron-cs1w-cif31-device-id.patch binder-fix-uaf-of-ref-proc-caused-by-race-condition.patch usb-dwc3-qcom-fix-use-after-free-on-runtime-pm-wakeu.patch +drm-i915-reg-fix-spelling-mistake-unsupport-unsuppor.patch +clk-core-honor-clk_ops_parent_enable-for-clk-gate-op.patch +revert-clk-core-honor-clk_ops_parent_enable-for-clk-.patch +clk-core-fix-runtime-pm-sequence-in-clk_core_unprepa.patch +input-rk805-pwrkey-fix-module-autoloading.patch +hwmon-gpio-fan-fix-array-out-of-bounds-access.patch