From: Greg Kroah-Hartman Date: Mon, 14 Nov 2022 11:11:36 +0000 (+0100) Subject: 4.9-stable patches X-Git-Tag: v5.10.155~24 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=cb1545df2275143588a3f36d741bd699219f801f;p=thirdparty%2Fkernel%2Fstable-queue.git 4.9-stable patches added patches: dmaengine-at_hdmac-check-return-code-of-dma_async_device_register.patch dmaengine-at_hdmac-don-t-allow-cpu-to-reorder-channel-enable.patch dmaengine-at_hdmac-don-t-start-transactions-at-tx_submit-level.patch dmaengine-at_hdmac-fix-at_lli-struct-definition.patch dmaengine-at_hdmac-fix-completion-of-unissued-descriptor-in-case-of-errors.patch dmaengine-at_hdmac-fix-impossible-condition.patch --- diff --git a/queue-4.9/dmaengine-at_hdmac-check-return-code-of-dma_async_device_register.patch b/queue-4.9/dmaengine-at_hdmac-check-return-code-of-dma_async_device_register.patch new file mode 100644 index 00000000000..efa32657988 --- /dev/null +++ b/queue-4.9/dmaengine-at_hdmac-check-return-code-of-dma_async_device_register.patch @@ -0,0 +1,47 @@ +From c47e6403fa099f200868d6b106701cb42d181d2b Mon Sep 17 00:00:00 2001 +From: Tudor Ambarus +Date: Tue, 25 Oct 2022 12:02:49 +0300 +Subject: dmaengine: at_hdmac: Check return code of dma_async_device_register + +From: Tudor Ambarus + +commit c47e6403fa099f200868d6b106701cb42d181d2b upstream. + +dma_async_device_register() can fail, check the return code and display an +error. + +Fixes: dc78baa2b90b ("dmaengine: at_hdmac: new driver for the Atmel AHB DMA Controller") +Signed-off-by: Tudor Ambarus +Cc: stable@vger.kernel.org +Acked-by: Nicolas Ferre +Link: https://lore.kernel.org/r/20221025090306.297886-1-tudor.ambarus@microchip.com +Link: https://lore.kernel.org/r/20221025090306.297886-16-tudor.ambarus@microchip.com +Signed-off-by: Vinod Koul +Signed-off-by: Greg Kroah-Hartman +--- + drivers/dma/at_hdmac.c | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +--- a/drivers/dma/at_hdmac.c ++++ b/drivers/dma/at_hdmac.c +@@ -2092,7 +2092,11 @@ static int __init at_dma_probe(struct pl + dma_has_cap(DMA_SG, atdma->dma_common.cap_mask) ? "sg-cpy " : "", + plat_dat->nr_channels); + +- dma_async_device_register(&atdma->dma_common); ++ err = dma_async_device_register(&atdma->dma_common); ++ if (err) { ++ dev_err(&pdev->dev, "Unable to register: %d.\n", err); ++ goto err_dma_async_device_register; ++ } + + /* + * Do not return an error if the dmac node is not present in order to +@@ -2112,6 +2116,7 @@ static int __init at_dma_probe(struct pl + + err_of_dma_controller_register: + dma_async_device_unregister(&atdma->dma_common); ++err_dma_async_device_register: + dma_pool_destroy(atdma->memset_pool); + err_memset_pool_create: + dma_pool_destroy(atdma->dma_desc_pool); diff --git a/queue-4.9/dmaengine-at_hdmac-don-t-allow-cpu-to-reorder-channel-enable.patch b/queue-4.9/dmaengine-at_hdmac-don-t-allow-cpu-to-reorder-channel-enable.patch new file mode 100644 index 00000000000..a5b0f3a56a4 --- /dev/null +++ b/queue-4.9/dmaengine-at_hdmac-don-t-allow-cpu-to-reorder-channel-enable.patch @@ -0,0 +1,40 @@ +From 580ee84405c27d6ed419abe4d2b3de1968abdafd Mon Sep 17 00:00:00 2001 +From: Tudor Ambarus +Date: Tue, 25 Oct 2022 12:02:47 +0300 +Subject: dmaengine: at_hdmac: Don't allow CPU to reorder channel enable + +From: Tudor Ambarus + +commit 580ee84405c27d6ed419abe4d2b3de1968abdafd upstream. + +at_hdmac uses __raw_writel for register writes. In the absence of a +barrier, the CPU may reorder the register operations. +Introduce a write memory barrier so that the CPU does not reorder the +channel enable, thus the start of the transfer, without making sure that +all the pre-required register fields are already written. + +Fixes: dc78baa2b90b ("dmaengine: at_hdmac: new driver for the Atmel AHB DMA Controller") +Reported-by: Peter Rosin +Signed-off-by: Tudor Ambarus +Cc: stable@vger.kernel.org +Link: https://lore.kernel.org/lkml/13c6c9a2-6db5-c3bf-349b-4c127ad3496a@axentia.se/ +Acked-by: Nicolas Ferre +Link: https://lore.kernel.org/r/20221025090306.297886-1-tudor.ambarus@microchip.com +Link: https://lore.kernel.org/r/20221025090306.297886-14-tudor.ambarus@microchip.com +Signed-off-by: Vinod Koul +Signed-off-by: Greg Kroah-Hartman +--- + drivers/dma/at_hdmac.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/dma/at_hdmac.c ++++ b/drivers/dma/at_hdmac.c +@@ -253,6 +253,8 @@ static void atc_dostart(struct at_dma_ch + ATC_SPIP_BOUNDARY(first->boundary)); + channel_writel(atchan, DPIP, ATC_DPIP_HOLE(first->dst_hole) | + ATC_DPIP_BOUNDARY(first->boundary)); ++ /* Don't allow CPU to reorder channel enable. */ ++ wmb(); + dma_writel(atdma, CHER, atchan->mask); + + vdbg_dump_regs(atchan); diff --git a/queue-4.9/dmaengine-at_hdmac-don-t-start-transactions-at-tx_submit-level.patch b/queue-4.9/dmaengine-at_hdmac-don-t-start-transactions-at-tx_submit-level.patch new file mode 100644 index 00000000000..f8db2063867 --- /dev/null +++ b/queue-4.9/dmaengine-at_hdmac-don-t-start-transactions-at-tx_submit-level.patch @@ -0,0 +1,59 @@ +From 7176a6a8982d311e50a7c1168868d26e65bbba19 Mon Sep 17 00:00:00 2001 +From: Tudor Ambarus +Date: Tue, 25 Oct 2022 12:02:36 +0300 +Subject: dmaengine: at_hdmac: Don't start transactions at tx_submit level + +From: Tudor Ambarus + +commit 7176a6a8982d311e50a7c1168868d26e65bbba19 upstream. + +tx_submit is supposed to push the current transaction descriptor to a +pending queue, waiting for issue_pending() to be called. issue_pending() +must start the transfer, not tx_submit(), thus remove atc_dostart() from +atc_tx_submit(). Clients of at_xdmac that assume that tx_submit() starts +the transfer must be updated and call dma_async_issue_pending() if they +miss to call it. +The vdbg print was moved to after the lock is released. It is desirable to +do the prints without the lock held if possible, and because the if +statement disappears there's no reason why to do the print while holding +the lock. + +Fixes: dc78baa2b90b ("dmaengine: at_hdmac: new driver for the Atmel AHB DMA Controller") +Reported-by: Peter Rosin +Signed-off-by: Tudor Ambarus +Cc: stable@vger.kernel.org +Link: https://lore.kernel.org/lkml/13c6c9a2-6db5-c3bf-349b-4c127ad3496a@axentia.se/ +Acked-by: Nicolas Ferre +Link: https://lore.kernel.org/r/20221025090306.297886-1-tudor.ambarus@microchip.com +Link: https://lore.kernel.org/r/20221025090306.297886-3-tudor.ambarus@microchip.com +Signed-off-by: Vinod Koul +Signed-off-by: Greg Kroah-Hartman +--- + drivers/dma/at_hdmac.c | 14 +++----------- + 1 file changed, 3 insertions(+), 11 deletions(-) + +--- a/drivers/dma/at_hdmac.c ++++ b/drivers/dma/at_hdmac.c +@@ -681,19 +681,11 @@ static dma_cookie_t atc_tx_submit(struct + spin_lock_irqsave(&atchan->lock, flags); + cookie = dma_cookie_assign(tx); + +- if (list_empty(&atchan->active_list)) { +- dev_vdbg(chan2dev(tx->chan), "tx_submit: started %u\n", +- desc->txd.cookie); +- atc_dostart(atchan, desc); +- list_add_tail(&desc->desc_node, &atchan->active_list); +- } else { +- dev_vdbg(chan2dev(tx->chan), "tx_submit: queued %u\n", +- desc->txd.cookie); +- list_add_tail(&desc->desc_node, &atchan->queue); +- } +- ++ list_add_tail(&desc->desc_node, &atchan->queue); + spin_unlock_irqrestore(&atchan->lock, flags); + ++ dev_vdbg(chan2dev(tx->chan), "tx_submit: queued %u\n", ++ desc->txd.cookie); + return cookie; + } + diff --git a/queue-4.9/dmaengine-at_hdmac-fix-at_lli-struct-definition.patch b/queue-4.9/dmaengine-at_hdmac-fix-at_lli-struct-definition.patch new file mode 100644 index 00000000000..0c9dfa0b708 --- /dev/null +++ b/queue-4.9/dmaengine-at_hdmac-fix-at_lli-struct-definition.patch @@ -0,0 +1,46 @@ +From f1171bbdd2ba2a50ee64bb198a78c268a5baf5f1 Mon Sep 17 00:00:00 2001 +From: Tudor Ambarus +Date: Tue, 25 Oct 2022 12:02:35 +0300 +Subject: dmaengine: at_hdmac: Fix at_lli struct definition + +From: Tudor Ambarus + +commit f1171bbdd2ba2a50ee64bb198a78c268a5baf5f1 upstream. + +Those hardware registers are all of 32 bits, while dma_addr_t ca be of +type u64 or u32 depending on CONFIG_ARCH_DMA_ADDR_T_64BIT. Force u32 to +comply with what the hardware expects. + +Fixes: dc78baa2b90b ("dmaengine: at_hdmac: new driver for the Atmel AHB DMA Controller") +Signed-off-by: Tudor Ambarus +Cc: stable@vger.kernel.org +Acked-by: Nicolas Ferre +Link: https://lore.kernel.org/r/20221025090306.297886-1-tudor.ambarus@microchip.com +Link: https://lore.kernel.org/r/20221025090306.297886-2-tudor.ambarus@microchip.com +Signed-off-by: Vinod Koul +Signed-off-by: Greg Kroah-Hartman +--- + drivers/dma/at_hdmac_regs.h | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +--- a/drivers/dma/at_hdmac_regs.h ++++ b/drivers/dma/at_hdmac_regs.h +@@ -168,13 +168,13 @@ + /* LLI == Linked List Item; aka DMA buffer descriptor */ + struct at_lli { + /* values that are not changed by hardware */ +- dma_addr_t saddr; +- dma_addr_t daddr; ++ u32 saddr; ++ u32 daddr; + /* value that may get written back: */ +- u32 ctrla; ++ u32 ctrla; + /* more values that are not changed by hardware */ +- u32 ctrlb; +- dma_addr_t dscr; /* chain to next lli */ ++ u32 ctrlb; ++ u32 dscr; /* chain to next lli */ + }; + + /** diff --git a/queue-4.9/dmaengine-at_hdmac-fix-completion-of-unissued-descriptor-in-case-of-errors.patch b/queue-4.9/dmaengine-at_hdmac-fix-completion-of-unissued-descriptor-in-case-of-errors.patch new file mode 100644 index 00000000000..384e8a60eb7 --- /dev/null +++ b/queue-4.9/dmaengine-at_hdmac-fix-completion-of-unissued-descriptor-in-case-of-errors.patch @@ -0,0 +1,42 @@ +From ef2cb4f0ce479f77607b04c4b0414bf32f863ee8 Mon Sep 17 00:00:00 2001 +From: Tudor Ambarus +Date: Tue, 25 Oct 2022 12:02:46 +0300 +Subject: dmaengine: at_hdmac: Fix completion of unissued descriptor in case of errors + +From: Tudor Ambarus + +commit ef2cb4f0ce479f77607b04c4b0414bf32f863ee8 upstream. + +In case the controller detected an error, the code took the chance to move +all the queued (submitted) descriptors to the active (issued) list. This +was wrong as if there were any descriptors in the submitted list they were +moved to the issued list without actually issuing them to the controller, +thus a completion could be raised without even fireing the descriptor. + +Fixes: dc78baa2b90b ("dmaengine: at_hdmac: new driver for the Atmel AHB DMA Controller") +Reported-by: Peter Rosin +Signed-off-by: Tudor Ambarus +Cc: stable@vger.kernel.org +Link: https://lore.kernel.org/lkml/13c6c9a2-6db5-c3bf-349b-4c127ad3496a@axentia.se/ +Acked-by: Nicolas Ferre +Link: https://lore.kernel.org/r/20221025090306.297886-1-tudor.ambarus@microchip.com +Link: https://lore.kernel.org/r/20221025090306.297886-13-tudor.ambarus@microchip.com +Signed-off-by: Vinod Koul +Signed-off-by: Greg Kroah-Hartman +--- + drivers/dma/at_hdmac.c | 4 ---- + 1 file changed, 4 deletions(-) + +--- a/drivers/dma/at_hdmac.c ++++ b/drivers/dma/at_hdmac.c +@@ -557,10 +557,6 @@ static void atc_handle_error(struct at_d + bad_desc = atc_first_active(atchan); + list_del_init(&bad_desc->desc_node); + +- /* As we are stopped, take advantage to push queued descriptors +- * in active_list */ +- list_splice_init(&atchan->queue, atchan->active_list.prev); +- + /* Try to restart the controller */ + if (!list_empty(&atchan->active_list)) + atc_dostart(atchan, atc_first_active(atchan)); diff --git a/queue-4.9/dmaengine-at_hdmac-fix-impossible-condition.patch b/queue-4.9/dmaengine-at_hdmac-fix-impossible-condition.patch new file mode 100644 index 00000000000..55b77e1c1ee --- /dev/null +++ b/queue-4.9/dmaengine-at_hdmac-fix-impossible-condition.patch @@ -0,0 +1,55 @@ +From 28cbe5a0a46a6637adbda52337d7b2777fc04027 Mon Sep 17 00:00:00 2001 +From: Tudor Ambarus +Date: Tue, 25 Oct 2022 12:02:48 +0300 +Subject: dmaengine: at_hdmac: Fix impossible condition + +From: Tudor Ambarus + +commit 28cbe5a0a46a6637adbda52337d7b2777fc04027 upstream. + +The iterator can not be greater than ATC_MAX_DSCR_TRIALS, as the for loop +will stop when i == ATC_MAX_DSCR_TRIALS. While here, use the common "i" +name for the iterator. + +Fixes: 93dce3a6434f ("dmaengine: at_hdmac: fix residue computation") +Signed-off-by: Tudor Ambarus +Cc: stable@vger.kernel.org +Acked-by: Nicolas Ferre +Link: https://lore.kernel.org/r/20221025090306.297886-1-tudor.ambarus@microchip.com +Link: https://lore.kernel.org/r/20221025090306.297886-15-tudor.ambarus@microchip.com +Signed-off-by: Vinod Koul +Signed-off-by: Greg Kroah-Hartman +--- + drivers/dma/at_hdmac.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +--- a/drivers/dma/at_hdmac.c ++++ b/drivers/dma/at_hdmac.c +@@ -315,7 +315,8 @@ static int atc_get_bytes_left(struct dma + struct at_desc *desc_first = atc_first_active(atchan); + struct at_desc *desc; + int ret; +- u32 ctrla, dscr, trials; ++ u32 ctrla, dscr; ++ unsigned int i; + + /* + * If the cookie doesn't match to the currently running transfer then +@@ -385,7 +386,7 @@ static int atc_get_bytes_left(struct dma + dscr = channel_readl(atchan, DSCR); + rmb(); /* ensure DSCR is read before CTRLA */ + ctrla = channel_readl(atchan, CTRLA); +- for (trials = 0; trials < ATC_MAX_DSCR_TRIALS; ++trials) { ++ for (i = 0; i < ATC_MAX_DSCR_TRIALS; ++i) { + u32 new_dscr; + + rmb(); /* ensure DSCR is read after CTRLA */ +@@ -411,7 +412,7 @@ static int atc_get_bytes_left(struct dma + rmb(); /* ensure DSCR is read before CTRLA */ + ctrla = channel_readl(atchan, CTRLA); + } +- if (unlikely(trials >= ATC_MAX_DSCR_TRIALS)) ++ if (unlikely(i == ATC_MAX_DSCR_TRIALS)) + return -ETIMEDOUT; + + /* for the first descriptor we can be more accurate */ diff --git a/queue-4.9/series b/queue-4.9/series index c330c20afce..fc11344a31d 100644 --- a/queue-4.9/series +++ b/queue-4.9/series @@ -20,3 +20,9 @@ platform-x86-hp_wmi-fix-rfkill-causing-soft-blocked-wifi.patch btrfs-selftests-fix-wrong-error-check-in-btrfs_free_dummy_root.patch udf-fix-a-slab-out-of-bounds-write-bug-in-udf_find_entry.patch cert-host-tools-stop-complaining-about-deprecated-openssl-functions.patch +dmaengine-at_hdmac-fix-at_lli-struct-definition.patch +dmaengine-at_hdmac-don-t-start-transactions-at-tx_submit-level.patch +dmaengine-at_hdmac-fix-completion-of-unissued-descriptor-in-case-of-errors.patch +dmaengine-at_hdmac-don-t-allow-cpu-to-reorder-channel-enable.patch +dmaengine-at_hdmac-fix-impossible-condition.patch +dmaengine-at_hdmac-check-return-code-of-dma_async_device_register.patch