From: H.J. Lu Date: Fri, 23 May 2008 00:18:52 +0000 (+0000) Subject: gas/testsuite/ X-Git-Tag: msnyder-reverse-20080609-branchpoint~136 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=cbc80391d0150f6926d2b18db4bafa7ce23f17a5;p=thirdparty%2Fbinutils-gdb.git gas/testsuite/ 2008-05-22 H.J. Lu * gas/i386/sse-noavx.s: Add tests for cvtpd2pi, cvtpi2pd and cvttpd2pi. * gas/i386/x86-64-sse-noavx.s: Likewise. * gas/i386/sse-noavx.d: Updated. * gas/i386/x86-64-sse-noavx.d: Likewise. opcodes/ 2008-05-22 H.J. Lu * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi. * i386-tbl.h: Regenerated. --- diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 8236eeb02ba..86a69ed7cb2 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,12 @@ +2008-05-22 H.J. Lu + + * gas/i386/sse-noavx.s: Add tests for cvtpd2pi, cvtpi2pd and + cvttpd2pi. + * gas/i386/x86-64-sse-noavx.s: Likewise. + + * gas/i386/sse-noavx.d: Updated. + * gas/i386/x86-64-sse-noavx.d: Likewise. + 2008-05-22 H.J. Lu PR gas/6517 diff --git a/gas/testsuite/gas/i386/sse-noavx.d b/gas/testsuite/gas/i386/sse-noavx.d index 4d5b6e6c207..518e9d5598b 100644 --- a/gas/testsuite/gas/i386/sse-noavx.d +++ b/gas/testsuite/gas/i386/sse-noavx.d @@ -8,8 +8,11 @@ Disassembly of section .text: 0+ <_start>: [ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32b %cl,%ebx +[ ]*[a-f0-9]+: 66 0f 2d d3 cvtpd2pi %xmm3,%mm2 +[ ]*[a-f0-9]+: 66 0f 2a d3 cvtpi2pd %mm3,%xmm2 [ ]*[a-f0-9]+: 0f 2a d3 cvtpi2ps %mm3,%xmm2 [ ]*[a-f0-9]+: 0f 2d f7 cvtps2pi %xmm7,%mm6 +[ ]*[a-f0-9]+: 66 0f 2c dc cvttpd2pi %xmm4,%mm3 [ ]*[a-f0-9]+: 0f 2c dc cvttps2pi %xmm4,%mm3 [ ]*[a-f0-9]+: df 08 fisttp \(%eax\) [ ]*[a-f0-9]+: dd 08 fisttpll \(%eax\) diff --git a/gas/testsuite/gas/i386/sse-noavx.s b/gas/testsuite/gas/i386/sse-noavx.s index 53f5c92453c..e0a5b541188 100644 --- a/gas/testsuite/gas/i386/sse-noavx.s +++ b/gas/testsuite/gas/i386/sse-noavx.s @@ -3,8 +3,11 @@ .text _start: crc32 %cl,%ebx + cvtpd2pi %xmm3,%mm2 + cvtpi2pd %mm3,%xmm2 cvtpi2ps %mm3,%xmm2 cvtps2pi %xmm7,%mm6 + cvttpd2pi %xmm4,%mm3 cvttps2pi %xmm4,%mm3 fisttp (%eax) fisttpll (%eax) diff --git a/gas/testsuite/gas/i386/x86-64-sse-noavx.d b/gas/testsuite/gas/i386/x86-64-sse-noavx.d index 3c842012c0a..32846a68cb5 100644 --- a/gas/testsuite/gas/i386/x86-64-sse-noavx.d +++ b/gas/testsuite/gas/i386/x86-64-sse-noavx.d @@ -9,8 +9,11 @@ Disassembly of section .text: 0+ <_start>: [ ]*[a-f0-9]+: 48 0f c7 08 cmpxchg16b \(%rax\) [ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32b %cl,%ebx +[ ]*[a-f0-9]+: 66 0f 2d d3 cvtpd2pi %xmm3,%mm2 +[ ]*[a-f0-9]+: 66 0f 2a d3 cvtpi2pd %mm3,%xmm2 [ ]*[a-f0-9]+: 0f 2a d3 cvtpi2ps %mm3,%xmm2 [ ]*[a-f0-9]+: 0f 2d f7 cvtps2pi %xmm7,%mm6 +[ ]*[a-f0-9]+: 66 0f 2c dc cvttpd2pi %xmm4,%mm3 [ ]*[a-f0-9]+: 0f 2c dc cvttps2pi %xmm4,%mm3 [ ]*[a-f0-9]+: df 08 fisttp \(%rax\) [ ]*[a-f0-9]+: dd 08 fisttpll \(%rax\) diff --git a/gas/testsuite/gas/i386/x86-64-sse-noavx.s b/gas/testsuite/gas/i386/x86-64-sse-noavx.s index 309c9283728..08a8c22e3c0 100644 --- a/gas/testsuite/gas/i386/x86-64-sse-noavx.s +++ b/gas/testsuite/gas/i386/x86-64-sse-noavx.s @@ -4,8 +4,11 @@ _start: cmpxchg16b (%rax) crc32 %cl,%ebx + cvtpd2pi %xmm3,%mm2 + cvtpi2pd %mm3,%xmm2 cvtpi2ps %mm3,%xmm2 cvtps2pi %xmm7,%mm6 + cvttpd2pi %xmm4,%mm3 cvttps2pi %xmm4,%mm3 fisttp (%rax) fisttpll (%rax) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 197aedfdda1..ea181f27865 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2008-05-22 H.J. Lu + + * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi. + * i386-tbl.h: Regenerated. + 2008-05-22 H.J. Lu PR gas/6517 diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index 0881c737c41..37d6347cb5b 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -1352,7 +1352,7 @@ cmpsd, 3, 0xf2c2, None, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_ cmpsd, 3, 0xf20fc2, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } comisd, 2, 0x662f, None, 1, CpuAVX, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } comisd, 2, 0x660f2f, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } -cvtpi2pd, 2, 0x660f2a, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegMMX, RegXMM } +cvtpi2pd, 2, 0x660f2a, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoAVX, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegMMX, RegXMM } cvtsi2sd, 2, 0xf22a, None, 1, CpuAVX|CpuNo64, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Reg32|Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegXMM } cvtsi2sd, 2, 0xf22a, None, 1, CpuAVX|Cpu64, Modrm|Vex|Vex0F|VexNDS|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|SSE2AVX, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegXMM } cvtsi2sd, 2, 0xf20f2a, None, 2, CpuSSE2|CpuNo64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32|Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegXMM } @@ -1427,7 +1427,7 @@ cvtpd2dq, 2, 0xf2e6, None, 1, CpuAVX, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf cvtpd2dq, 2, 0xf20fe6, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } cvtdq2ps, 2, 0x5b, None, 1, CpuAVX, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } cvtdq2ps, 2, 0xf5b, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } -cvtpd2pi, 2, 0x660f2d, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegMMX } +cvtpd2pi, 2, 0x660f2d, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoAVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegMMX } cvtpd2ps, 2, 0x665a, None, 1, CpuAVX, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } cvtpd2ps, 2, 0x660f5a, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } cvtps2pd, 2, 0x5a, None, 1, CpuAVX, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } @@ -1440,7 +1440,7 @@ cvtsd2ss, 2, 0xf25a, None, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf| cvtsd2ss, 2, 0xf20f5a, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } cvtss2sd, 2, 0xf35a, None, 1, CpuAVX, Modrm|Vex|Vex0F|VexNDS|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } cvtss2sd, 2, 0xf30f5a, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Dword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } -cvttpd2pi, 2, 0x660f2c, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegMMX } +cvttpd2pi, 2, 0x660f2c, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoAVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegMMX } cvttsd2si, 2, 0xf22c, None, 1, CpuAVX, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|ToDword|SSE2AVX, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, Reg32|Reg64 } cvttsd2si, 2, 0xf20f2c, None, 2, CpuSSE2, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|ToDword, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, Reg32|Reg64 } cvttpd2dq, 2, 0x66e6, None, 1, CpuAVX, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SSE2AVX, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM } diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index a76bd374686..a4ffdfa6be1 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -12003,7 +12003,7 @@ const template i386_optab[] = 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }, @@ -12894,7 +12894,7 @@ const template i386_optab[] = 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -13050,7 +13050,7 @@ const template i386_optab[] = 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }, { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 }, { { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0 } }, @@ -20096,7 +20096,7 @@ const template i386_optab[] = { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }, { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 1, - 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, { { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0,