From: Bibo Mao Date: Wed, 30 Jul 2025 01:47:55 +0000 (+0800) Subject: target/loongarch: Use correct address when flush tlb X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=cc78259deb21940521a227619eb00a4b8e3e36c2;p=thirdparty%2Fqemu.git target/loongarch: Use correct address when flush tlb With tlb_flush_range_by_mmuidx(), the virtual address is 64 bit. However on LoongArch TLB emulation system, virtual address is 48 bit. It is necessary to signed-extend 48 bit address to 64 bit when flush tlb, also fix address calculation issue with odd page. Signed-off-by: Bibo Mao Reviewed-by: Richard Henderson --- diff --git a/target/loongarch/tcg/tlb_helper.c b/target/loongarch/tcg/tlb_helper.c index 7d3f98633d5..9365860c8c9 100644 --- a/target/loongarch/tcg/tlb_helper.c +++ b/target/loongarch/tcg/tlb_helper.c @@ -115,16 +115,16 @@ static void invalidate_tlb_entry(CPULoongArchState *env, int index) tlb_ps = FIELD_EX64(tlb->tlb_misc, TLB_MISC, PS); pagesize = MAKE_64BIT_MASK(tlb_ps, 1); mask = MAKE_64BIT_MASK(0, tlb_ps + 1); + addr = (tlb_vppn << R_TLB_MISC_VPPN_SHIFT) & ~mask; + addr = sextract64(addr, 0, TARGET_VIRT_ADDR_SPACE_BITS); if (tlb_v0) { - addr = (tlb_vppn << R_TLB_MISC_VPPN_SHIFT) & ~mask; /* even */ tlb_flush_range_by_mmuidx(env_cpu(env), addr, pagesize, mmu_idx, TARGET_LONG_BITS); } if (tlb_v1) { - addr = (tlb_vppn << R_TLB_MISC_VPPN_SHIFT) & pagesize; /* odd */ - tlb_flush_range_by_mmuidx(env_cpu(env), addr, pagesize, + tlb_flush_range_by_mmuidx(env_cpu(env), addr + pagesize, pagesize, mmu_idx, TARGET_LONG_BITS); } }