From: Alexandre Oliva <oliva@adacore.com>
Date: Fri, 12 Jul 2024 08:42:07 +0000 (-0300)
Subject: [alpha] adjust MEM alignment for block move [PR115459]
X-Git-Tag: basepoints/gcc-16~7557
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=ccfe71518039;p=thirdparty%2Fgcc.git

[alpha] adjust MEM alignment for block move [PR115459]

Before issuing loads or stores for a block move, adjust the MEM
alignments if analysis of the addresses enabled the inference of
stricter alignment.  This ensures that the MEMs are sufficiently
aligned for the corresponding insns, which avoids trouble in case of
e.g. substitutions into SUBREGs.


for  gcc/ChangeLog

	PR target/115459
	* config/alpha/alpha.cc (alpha_expand_block_move): Adjust
	MEMs to match inferred alignment.
---

diff --git a/gcc/config/alpha/alpha.cc b/gcc/config/alpha/alpha.cc
index a6fe95e7177..74631a41693 100644
--- a/gcc/config/alpha/alpha.cc
+++ b/gcc/config/alpha/alpha.cc
@@ -3820,6 +3820,12 @@ alpha_expand_block_move (rtx operands[])
           else if (a >= 16 && c % 2 == 0)
 	    src_align = 16;
 	}
+
+      if (MEM_P (orig_src) && MEM_ALIGN (orig_src) < src_align)
+	{
+	  orig_src = shallow_copy_rtx (orig_src);
+	  set_mem_align (orig_src, src_align);
+	}
     }
 
   tmp = XEXP (orig_dst, 0);
@@ -3841,6 +3847,12 @@ alpha_expand_block_move (rtx operands[])
           else if (a >= 16 && c % 2 == 0)
 	    dst_align = 16;
 	}
+
+      if (MEM_P (orig_dst) && MEM_ALIGN (orig_dst) < dst_align)
+	{
+	  orig_dst = shallow_copy_rtx (orig_dst);
+	  set_mem_align (orig_dst, dst_align);
+	}
     }
 
   ofs = 0;