From: Heiko Thiery <heiko.thiery@gmail.com>
Date: Thu, 12 Jun 2025 11:50:15 +0000 (+0200)
Subject: mach-k3: j722s: enable caches for the SPL stage
X-Git-Tag: v2025.10-rc1~91^2~25
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=cf2abe7b1e6d5a2266d14f801d4eb52edec39ed6;p=thirdparty%2Fu-boot.git

mach-k3: j722s: enable caches for the SPL stage

This is same as done in commit 27cd65ca1bf1 ("mach-k3: am62ax: enable
caches for the SPL stage").

This is resulting in ~2x speedup in the A53 SPL stage.

Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
---

diff --git a/arch/arm/mach-k3/j722s/j722s_init.c b/arch/arm/mach-k3/j722s/j722s_init.c
index d8123f282ee..1180c75f551 100644
--- a/arch/arm/mach-k3/j722s/j722s_init.c
+++ b/arch/arm/mach-k3/j722s/j722s_init.c
@@ -166,6 +166,8 @@ static void k3_mem_init(void)
 		if (ret)
 			panic("DRAM init failed: %d\n", ret);
 	}
+
+	spl_enable_cache();
 }
 
 static __maybe_unused void enable_mcu_esm_reset(void)