From: Denzeel Oliva Date: Sun, 31 Aug 2025 12:13:15 +0000 (+0000) Subject: clk: samsung: exynos990: Add LHS_ACEL gate clock for HSI0 and update CLK_NR_TOP X-Git-Tag: v6.18-rc1~50^2~6^2~2^2~3 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=d0563d320b6014a8d56170253fe0aec524658b9f;p=thirdparty%2Fkernel%2Fstable.git clk: samsung: exynos990: Add LHS_ACEL gate clock for HSI0 and update CLK_NR_TOP Add the LHS_ACEL gate clock to the HSI0 clock controller. This clock is critical for USB functionality and mark it as critical to keep it enabled. Update CLK_NR_TOP to include the new clock. Signed-off-by: Denzeel Oliva Link: https://lore.kernel.org/r/20250831-usb-v2-2-00b9c0559733@gmail.com Signed-off-by: Krzysztof Kozlowski --- diff --git a/drivers/clk/samsung/clk-exynos990.c b/drivers/clk/samsung/clk-exynos990.c index 91736b15c4b4..7884354d612c 100644 --- a/drivers/clk/samsung/clk-exynos990.c +++ b/drivers/clk/samsung/clk-exynos990.c @@ -18,7 +18,7 @@ /* NOTE: Must be equal to the last clock ID increased by one */ #define CLKS_NR_TOP (CLK_DOUT_CMU_CLK_CMUREF + 1) -#define CLKS_NR_HSI0 (CLK_GOUT_HSI0_XIU_D_HSI0_ACLK + 1) +#define CLKS_NR_HSI0 (CLK_GOUT_HSI0_LHS_ACEL_D_HSI0_CLK + 1) #define CLKS_NR_PERIS (CLK_GOUT_PERIS_OTP_CON_TOP_OSCCLK + 1) /* ---- CMU_TOP ------------------------------------------------------------- */ @@ -1332,6 +1332,10 @@ static const struct samsung_gate_clock hsi0_gate_clks[] __initconst = { "gout_hsi0_xiu_d_hsi0_aclk", "mout_hsi0_bus_user", CLK_CON_GAT_GOUT_BLK_HSI0_UID_XIU_D_HSI0_IPCLKPORT_ACLK, 21, CLK_IGNORE_UNUSED, 0), + GATE(CLK_GOUT_HSI0_LHS_ACEL_D_HSI0_CLK, + "gout_hsi0_lhs_acel_d_hsi0_clk", "mout_hsi0_bus_user", + CLK_CON_GAT_GOUT_BLK_HSI0_UID_LHS_ACEL_D_HSI0_IPCLKPORT_I_CLK, + 21, CLK_IS_CRITICAL, 0), }; static const struct samsung_cmu_info hsi0_cmu_info __initconst = {