From: Jon Hunter Date: Wed, 8 May 2024 09:22:07 +0000 (+0100) Subject: PCI: tegra194: Set EP alignment restriction for inbound ATU X-Git-Tag: v6.11-rc1~97^2~3^2~1 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=d19a86d584e04191cdab7ced24d7ed791075697a;p=thirdparty%2Fkernel%2Flinux.git PCI: tegra194: Set EP alignment restriction for inbound ATU Tegra194 and Tegra234 PCIe EP controllers have 64K alignment restriction for the inbound ATU. Set the endpoint inbound ATU alignment to 64kB in the Tegra194 PCIe driver. Fixes: c57247f940e8 ("PCI: tegra: Add support for PCIe endpoint mode in Tegra194") Suggested-by: Manikanta Maddireddy Link: https://lore.kernel.org/linux-pci/20240508092207.337063-1-jonathanh@nvidia.com Signed-off-by: Jon Hunter Signed-off-by: Krzysztof Wilczyński Signed-off-by: Bjorn Helgaas Reviewed-by: Niklas Cassel --- diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index 93f5433c5c550..4537313ef37a9 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -2015,6 +2015,7 @@ static const struct pci_epc_features tegra_pcie_epc_features = { .bar[BAR_3] = { .type = BAR_RESERVED, }, .bar[BAR_4] = { .type = BAR_RESERVED, }, .bar[BAR_5] = { .type = BAR_RESERVED, }, + .align = SZ_64K, }; static const struct pci_epc_features*