From: Peter Maydell <peter.maydell@linaro.org>
Date: Fri, 13 Jan 2012 17:25:08 +0000 (+0000)
Subject: target-arm: Fix errors in decode of M profile CPS
X-Git-Tag: v1.1-rc0~581
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=d3cb6e2b062f69e0a40f21b74a42f5c5a3422174;p=thirdparty%2Fqemu.git

target-arm: Fix errors in decode of M profile CPS

Fix errors in the decode of M profile CPS:
 * the decode of the I (affects PRIMASK) and F (affects FAULTMASK)
   bits was reversed
 * the FAULTMASK system register number is 19, not 17

This fixes an issue reported as LP:913925.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---

diff --git a/target-arm/translate.c b/target-arm/translate.c
index f91553a48ab..280bfca62ba 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -9710,15 +9710,15 @@ static void disas_thumb_insn(CPUState *env, DisasContext *s)
                 break;
             if (IS_M(env)) {
                 tmp = tcg_const_i32((insn & (1 << 4)) != 0);
-                /* PRIMASK */
+                /* FAULTMASK */
                 if (insn & 1) {
-                    addr = tcg_const_i32(16);
+                    addr = tcg_const_i32(19);
                     gen_helper_v7m_msr(cpu_env, addr, tmp);
                     tcg_temp_free_i32(addr);
                 }
-                /* FAULTMASK */
+                /* PRIMASK */
                 if (insn & 2) {
-                    addr = tcg_const_i32(17);
+                    addr = tcg_const_i32(16);
                     gen_helper_v7m_msr(cpu_env, addr, tmp);
                     tcg_temp_free_i32(addr);
                 }