From: Greg Kroah-Hartman Date: Tue, 10 Dec 2024 09:46:50 +0000 (+0100) Subject: drop queue-6.12/drm-amdgpu-rework-resume-handling-for-display-v2.patch X-Git-Tag: v6.6.65~19 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=d7401e8a03dc1f62ca2c4ed10cd1d96782a5e5d0;p=thirdparty%2Fkernel%2Fstable-queue.git drop queue-6.12/drm-amdgpu-rework-resume-handling-for-display-v2.patch --- diff --git a/queue-6.12/drm-amdgpu-rework-resume-handling-for-display-v2.patch b/queue-6.12/drm-amdgpu-rework-resume-handling-for-display-v2.patch deleted file mode 100644 index e19b49de186..00000000000 --- a/queue-6.12/drm-amdgpu-rework-resume-handling-for-display-v2.patch +++ /dev/null @@ -1,116 +0,0 @@ -From 73dae652dcac776296890da215ee7dec357a1032 Mon Sep 17 00:00:00 2001 -From: Alex Deucher -Date: Mon, 25 Nov 2024 13:59:09 -0500 -Subject: drm/amdgpu: rework resume handling for display (v2) -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -From: Alex Deucher - -commit 73dae652dcac776296890da215ee7dec357a1032 upstream. - -Split resume into a 3rd step to handle displays when DCC is -enabled on DCN 4.0.1. Move display after the buffer funcs -have been re-enabled so that the GPU will do the move and -properly set the DCC metadata for DCN. - -v2: fix fence irq resume ordering - -Reviewed-by: Christian König -Signed-off-by: Alex Deucher -Cc: stable@vger.kernel.org # 6.11.x -Signed-off-by: Greg Kroah-Hartman ---- - drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 45 +++++++++++++++++++++++++++-- - 1 file changed, 43 insertions(+), 2 deletions(-) - ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c -@@ -3666,7 +3666,7 @@ static int amdgpu_device_ip_resume_phase - * - * @adev: amdgpu_device pointer - * -- * First resume function for hardware IPs. The list of all the hardware -+ * Second resume function for hardware IPs. The list of all the hardware - * IPs that make up the asic is walked and the resume callbacks are run for - * all blocks except COMMON, GMC, and IH. resume puts the hardware into a - * functional state after a suspend and updates the software state as -@@ -3684,6 +3684,7 @@ static int amdgpu_device_ip_resume_phase - if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON || - adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC || - adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_IH || -+ adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_DCE || - adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_PSP) - continue; - r = adev->ip_blocks[i].version->funcs->resume(adev); -@@ -3699,6 +3700,36 @@ static int amdgpu_device_ip_resume_phase - } - - /** -+ * amdgpu_device_ip_resume_phase3 - run resume for hardware IPs -+ * -+ * @adev: amdgpu_device pointer -+ * -+ * Third resume function for hardware IPs. The list of all the hardware -+ * IPs that make up the asic is walked and the resume callbacks are run for -+ * all DCE. resume puts the hardware into a functional state after a suspend -+ * and updates the software state as necessary. This function is also used -+ * for restoring the GPU after a GPU reset. -+ * -+ * Returns 0 on success, negative error code on failure. -+ */ -+static int amdgpu_device_ip_resume_phase3(struct amdgpu_device *adev) -+{ -+ int i, r; -+ -+ for (i = 0; i < adev->num_ip_blocks; i++) { -+ if (!adev->ip_blocks[i].status.valid || adev->ip_blocks[i].status.hw) -+ continue; -+ if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_DCE) { -+ r = amdgpu_ip_block_resume(&adev->ip_blocks[i]); -+ if (r) -+ return r; -+ } -+ } -+ -+ return 0; -+} -+ -+/** - * amdgpu_device_ip_resume - run resume for hardware IPs - * - * @adev: amdgpu_device pointer -@@ -3727,6 +3758,13 @@ static int amdgpu_device_ip_resume(struc - if (adev->mman.buffer_funcs_ring->sched.ready) - amdgpu_ttm_set_buffer_funcs_status(adev, true); - -+ if (r) -+ return r; -+ -+ amdgpu_fence_driver_hw_init(adev); -+ -+ r = amdgpu_device_ip_resume_phase3(adev); -+ - return r; - } - -@@ -4809,7 +4847,6 @@ int amdgpu_device_resume(struct drm_devi - dev_err(adev->dev, "amdgpu_device_ip_resume failed (%d).\n", r); - goto exit; - } -- amdgpu_fence_driver_hw_init(adev); - - if (!adev->in_s0ix) { - r = amdgpu_amdkfd_resume(adev, adev->in_runpm); -@@ -5431,6 +5468,10 @@ int amdgpu_do_asic_reset(struct list_hea - if (tmp_adev->mman.buffer_funcs_ring->sched.ready) - amdgpu_ttm_set_buffer_funcs_status(tmp_adev, true); - -+ r = amdgpu_device_ip_resume_phase3(tmp_adev); -+ if (r) -+ goto out; -+ - if (vram_lost) - amdgpu_device_fill_reset_magic(tmp_adev); -