From: Xiaojie Yuan <xiaojie.yuan@amd.com>
Date: Fri, 18 Oct 2019 10:46:38 +0000 (+0800)
Subject: drm/amdgpu/psp11: wait for sOS ready for ring creation
X-Git-Tag: v5.5-rc1~128^2~18^2~92
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=d7e7f1ea25d9bda9138d7fcb5eef87a9555f664b;p=thirdparty%2Fkernel%2Flinux.git

drm/amdgpu/psp11: wait for sOS ready for ring creation

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
index ace6e6c5629cc..e307b8d57fa37 100644
--- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
@@ -467,6 +467,14 @@ static int psp_v11_0_ring_create(struct psp_context *psp,
 				   0x80000000, 0x8000FFFF, false);
 
 	} else {
+		/* Wait for sOS ready for ring creation */
+		ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_64),
+				   0x80000000, 0x80000000, false);
+		if (ret) {
+			DRM_ERROR("Failed to wait for sOS ready for ring creation\n");
+			return ret;
+		}
+
 		/* Write low address of the ring to C2PMSG_69 */
 		psp_ring_reg = lower_32_bits(ring->ring_mem_mc_addr);
 		WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, psp_ring_reg);