From: David S. Miller Date: Mon, 18 Nov 2024 12:00:22 +0000 (+0000) Subject: Merge branch 'am65-cpsw-rx-dscp-prio-map' X-Git-Tag: v6.13-rc1~135^2~21 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=d7ef9eeef0723cc47601923c508ecbebd864f0c0;p=thirdparty%2Fkernel%2Flinux.git Merge branch 'am65-cpsw-rx-dscp-prio-map' Roger Quadros says: ==================== net: ethernet: ti: am65-cpsw: enable DSCP to priority map for RX Configure default DSCP to User Priority mapping registers as per: https://datatracker.ietf.org/doc/html/rfc8325#section-4.3 and https://datatracker.ietf.org/doc/html/rfc8622#section-11 Also update Priority to Thread maping to be compliant with IEEE802.1Q-2014. Priority Code Point (PCP) 2 is higher priority than PCP 0 (Best Effort). PCP 1 (Background) is lower priority than PCP 0 (Best Effort). --- Changes in v4: - Updated default DSCP to User Priority mapping as per https://datatracker.ietf.org/doc/html/rfc8325#section-4.3 and https://datatracker.ietf.org/doc/html/rfc8622#section-11 - Link to v3: https://lore.kernel.org/r/20241109-am65-cpsw-multi-rx-dscp-v3-0-1cfb76928490@kernel.org Changes in v3: - Added Reviewed-by tag to patch 1 - Added macros for DSCP PRI field size and DSCP PRI per register - Drop unnecessary readl() in am65_cpsw_port_set_dscp_map() - Link to v2: https://lore.kernel.org/r/20241107-am65-cpsw-multi-rx-dscp-v2-0-9e9cd1920035@kernel.org Changes in v2: - Updated references to more recent standard IEEE802.1Q-2014. - Dropped reference to web link which might change in the future. - Typo fix in commit log. - Link to v1: https://lore.kernel.org/r/20241105-am65-cpsw-multi-rx-dscp-v1-0-38db85333c88@kernel.org ==================== Signed-off-by: Roger Quadros Signed-off-by: David S. Miller --- d7ef9eeef0723cc47601923c508ecbebd864f0c0